Preliminary Specification
aMC8500
REFERENCE
(Pin 5)
Output Voltage (IO = 5.0 mA)
Vref
3.325
3.5
3.675
V
Line Regulation (VDD = 6.0 V to 15 V, IO = 5.0 mA)
Refline
-
2.0
30
mV
Load Regulation (VDD = 6.0 V, IO = 1.0 mA to 10 mA)
Refload
-
11
30
mV
Short Circuit Current (Note 4)
ISC
-
50
-
mA
Reference Output Load Current For Automatic Power Down Feature
(Pin 10 = 500 mV, Pin 14 = Gnd, t > 2.0s)
(Pin 10 = 3.5 V, Pin 14 = Open, t > 2.0s)
Enabled
Disabled
IO(PD)
-
2.0
1.4
1.6
1.0
-
mA
FAULT TIMER
Drive Enabled Time During A Fault Condition
ton(Flt)
-
0.25
-
s
Drive Disabled Time Before Restart
toff(Flt)
-
2.0
-
s
KICK START TIMER
Motor Kick Start Time (100% duty cycle applied)
ton(KS)
-
1.0
-
s
FREQUENCY GENERATOR / ROTOR LOCK
(Pin 15)
Low State Output Sink Voltage (Isink = 1.0 mA)
VOL(FG/RL)
-
0.13
0.25
V
Off-State Leakage Current (Voff = 12 V)
Ioff(Tach)
-
0.1
1.0
µA
Minimum Hall Frequency For Rotor Lock Output High State
fRL(min)
-
4.0
-
Hz
MOTOR DRIVES
(Pin 1, 16)
Low State Output Voltage (Isink = 500 mA)
VOL(Drv)
-
250
300
mV
Off-State Leakage Current (Voff = 30 V)
Ioff(Drv)
-
-
5.0
µA
Current Limit Threshold (Pin 2 open, Note 4)
ILim
900
1100
1300
mA
Non-Overlapping Commutation Delay
tdly(Com)
-
40
-
µs
TOTAL DEVICE
(Pin 12)
Power Supply Threshold Voltage
Start-Up (VDD increasing)
Hysteresis (VDD decreasing after turn-on)
Vth(on)
VH
-
-
4.7
500
-
-
V
mV
Power Supply Current
Operating
Power Down (Pin 10 = 0.5 V, IO(ref) ≤1.0 mA, t > 2.0s, Pin 14 = Gnd)
IS
IS(PwrDn)
-
-
1.6
130
2.0
200
mA
µA
- 4 -
© Andigilog, Inc. 2006
www.andigilog.com
August 2006 - 70A04018
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