Philips Semiconductors

Product specification

SA5200

RF dual gain-stage

1997 Nov 07

5–4

APPLICATIONS

SA5200 is a user-friendly, wide-band, unconditionally stable, low

power dual gain amplifier circuit. There are several advantages to

using the SA5200 as a high frequency gain block instead of a

discrete implementation. First is the simplicity of use. The SA5200

does not need any external biasing components. Due to the higher

level of integration and small footprint (SO8) package it occupies

less space on the printed circuit board and reduces the

manufacturing cost of the system. Also the higher level of

integration improves the reliability of the amplifier over a discrete

implementation with several components. The power down mode in

the SA5200 helps reduce power consumption in applications where

the amplifiers can be disabled. And last but not the least is the

impedance matching at inputs and outputs. Only those who have

toiled through discrete transistor implementations for 50

Ω input and

output impedance matching can truly appreciate the elegance and

simplicity of the SA5200 input and output impedance matching to

50

Ω.

A simplified equivalent schematic is shown in 3. Each amplifier is

composed of an NPN transistor with an Ft of 13GHz in a classical

series-shunt feedback configuration. The two wideband amplifiers

are biased from the same bias generator. In normal operation each

In the disable mode the device consumes about 90

µA of current,

most of it is in the TTL enable buffer and the bias generator. The

input impedance of the amplifiers is 50

Ω. The amplifiers have

typical gain of 11dB at 100MHz and 7dB of gain at 1.2GHz.

It can be seen from 3 that any inductance between Pin 7, 3 and the

ground plane will reduce the gain of the amplifiers at higher

frequencies. Thus proper grounding of Pins 7 and 3 is essential for

maximum gain and increased frequency response. 4 shows the

printed circuit board layout and the component placement for the

SA5200 evaluation board. The AC coupling capacitors should be

selected such that at they are shorts at the desired frequency of

operation. Since most low-cost large value surface mount

capacitors cease to be simply capacitors in the UHF range and

exhibit an inductive behavior, it is recommended that high frequency

chip capacitors be utilized in the circuit. A good power supply

bypass is also essential for the performance of the amplifier and

should be as close to the device as practical.

5 shows the typical frequency response of the two channels of

SA5200. The low frequency gain is about 11dB at 100MHz and

slowly drops off to 10dB at 500MHz. The gain is about 8dB at

900MHz and 7dB at 1.2 GHz which is typical of SA5200 with a good

printed circuit board layout. It can also be seen that both channels

have a very well matched frequency response and matched gain to

within 0.1dB at 100MHz and 0.2dB at 900MHz.

SA5200 finds applications in many areas of RF communications. It

is an ideal gain block for high performance, low cost, low power RF

communications transceivers. A typical radio transceiver front-end

is shown in 6. This could be the front-end of a cellular phone, a

VHF/ UHF hand-held transceiver, UHF cordless telephone or a

spread spectrum system. The SA5200 can be used in the receiver

path of most systems as an LNA and pre-amplifier. The bandpass

filter between the two amplifiers also minimize the noise into the first

mixer. In the transmitter path, SA5200 can be used as a buffer to

the VCO and isolate the VCO from any load variations due to the

power level changes in the power amplifier. This improves the

stability of the VCOs. The SA5200 can also be used as a pre-driver

to the power amplifier modules.

The two amplifiers in SA5200 can be easily cascaded to have a

13dB gain block at 900MHz. At 100MHz the gain will be 22dB and a

noise figure of about 5.5dB. The SA5200 can be operated at a

higher voltage up to 9V for much improved 1dB output compression

point and higher 3rd order intercept point.

Several stages of SA5200 can also be cascaded and be used as an

IF amplifier strip for DBS/TV/GPS receivers. 7 shows a 60dB gain

IF strip at 180MHz. The noise figure for the cascaded amplifier

chain is given by equation 1.

NF (total) = NF1 + NF2/G1 + NF3/G1*G2 + NF4/G1*G2*G3 + ...

(Equation. 1)

NOTE: The noise figure and gain should not be in dB in the above

equation.

Since the noise figure for each stage is about 3.6dB and the gain is

about 11dB, the noise figure for the 60dB gain IF strip will be about

6.4dB.

In applications where a single amplifier is required with a 7.5dB gain

at 900MHz and current consumption is of paramount importance

(battery powered receivers), the amplifier A1 can be used and

amplifier A2 can be disabled by leaving GND2 (Pin 3) unconnected.

This will reduce the total current consumption for the IC to a meager

4mA.

The ENABLE pin is useful for Time-Division-Duplex systems where

the receiver can be disabled for a period of time. In this case the

overall system supply current will be decreased by 8mA.

The ENABLE pin can also be used to improve the system dynamic

range. For input levels that are extremely high, the SA5200 can be

disabled. In this case the input signal is attenuated by 13dB. This

prevents the system from being overloaded as well as improves the

system’s overall dynamic range. In the disabled condition the