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SA5224 Datasheet(PDF) 4 Page - NXP Semiconductors

Part # SA5224
Description  FDDI fiber optic postamplifier
PDF  10 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

SA5224 Datasheet(HTML) 4 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
SA5224
FDDI fiber optic postamplifier
1998 Oct 07
4
DC ELECTRICAL CHARACTERISTICS
Min and Max limits apply over operating temperature at VCC = 5V ±10%, unless otherwise specified. Typical data apply at TA = 25°C and VCC =
+5V.
SYMBOL
PARAMETER
TEST CONDITIONS
SA5224
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
VIN
Input signal voltage
single-ended
differential
.002
.004
1.5
3.0
VP-P
VOS
Input offset voltage2
50
µV
VN
Input RMS noise2
60
µV
VTH
Input level-detect programmability
single-ended
VIN = 200kHz square
wave
2
12
mVP-P
VHYS
Level-detect hysteresis
4
5
6
dB
ICC
VCCA + VCCE supply current
No ECL loading
27
35
mA
IINL
JAM input current
Pin 8 = 0V
–10
10
µA
VOHMAX
Maximum logic high1
–0.880
VDC
VOHMIN
Minimum logic high1
–1.055
VDC
VOLMAX
Maximum logic low1
–1.620
VDC
VOLMIN
Minimum logic low1
–1.870
VDC
VIH
Minimum input for JAM = high1
–1.165
VDC
VIL
Maximum input for JAM = low1
–1.490
VDC
NOTES:
1. These ECL specifications are referenced to the VCCE rail and apply for TA = 0°C to 85°C.
2. Guaranteed by design.
AC ELECTRICAL CHARACTERISTICS
Typical data apply at TA = 25°C and VCC = +5V. Min and Max limits apply for 4.5 ≤ VCC ≤ 5.5V.
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
BW1
Lower –3dB bandwidth
CAZ = 0.1µF
0.5
1.0
1.5
kHz
BW2
Upper –3dB bandwidth
90
120
150
MHz
RIN
Input resistance
Pin 4 or 5
2.9
4.5
7.6
k
Ω
CIN
Input capacitance
Pin 4 or 5
2.5
pF
tr, tf
ECL output3
risetime,
falltime
RL = 50Ω
To VCCE - 2V
20-80%
1.2
2.2
ns
tPWD
Pulsewidth distortion
0.3
nsP-P
RAZ
Auto zero output resistance
Pin 1 or 2
155
250
423
k
Ω
RF
Level-detect filter resistance
Pin 7
14
24
41
k
Ω
tLD
Level-detect time constant
CF = 0
0.5
1.0
2.0
µs
NOTES:
1. Both outputs should be terminated identically to minimize differential feedback to the device inputs on a PC board or substrate.



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