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LTM2886 Datasheet(PDF) 12 Page - Analog Devices

Part # LTM2886
Description  Isolated USB Data Transceiver
PDF  18 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM2886 Datasheet(HTML) 12 Page - Analog Devices

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LTM2894
12
Rev A
For more information www.analog.com
APPLICATIONS INFORMATION
Supply Current Equations (Typical)
Operating:
IBUS = 6mA +IVLO
IBUS2 = 6mA +IVLO2
Suspend:
IBUSSPND = 1.5mA +IVLO
IBUS2SPND = 6mA +IVLO2
Off :
IBUSPOFF = 10µA
IBUS2POFF = 10µA
USB 2.0 Compatibility
The LTM2894 µModule transceiver is compatible with the
USB2.0specificationoffullandlowspeedoperation.Some
characteristics of the LTM2894 µModule transceiver may
notsupportfullcompliancewiththeUSB2.0specification.
The propagation delay for full speed data of 80ns exceeds
the specification for a single hub of 44ns plus the at-
tached cable delay of 26ns. This results from driving the
data signal to the 3.3V rail prior to a K-state transition to
maintain balanced crossover voltages equivalent to the
cross over voltages of the successive data transitions.
USB ports commonly drive the idle state bus to the 3.3V
rail prior to the K-state start of packet transition. Further,
the LTM2894 does not re-time the data transitions, and
will propagate the edges as received, with the potential to
add additional jitter or pulse width distortion.
Hot Plug Protection
The VBUS and VBUS2 inputs are bypassed with low ESR
ceramic capacitors. During a hot-plug event, the supply
inputs can overshoot the supplied voltage due to cable
inductance. When using external power supply sources
greaterthan24Vthatcanbehot-plugged,addanadditional
2.2µF tantalum capacitor with greater than 1Ω of ESR, or
a ceramic capacitor with a series 1Ω resistor to the VBUS
or VBUS2 input to reduce the possibility of exceeding ab-
solute maximum ratings. Refer to Application Note AN88,
Ceramic Capacitors Can Cause Overvoltage Transients, for
a detailed discussion of this problem.
PC Board Layout
The high integration of the LTM2894 makes PCB lay-
out simple. However, to optimize its electrical isolation
characteristics, and EMI, some layout considerations are
necessary. The PCB layout in Figure 5 is a recommended
configuration for a low EMI USB application. The following
considerationsoptimizetheperformanceoftheLTM2894.
• Do not place copper between the inner columns of
pads on the top or bottom on the PCB. This area must
remain open to withstand the rated isolation voltage
and maintain the creepage distance.
• Route D1– and D1+ and D2– and D2+ as differential
pairs with 90Ω impedance, matching the USB cable
impedance.
RF, Magnetic Field Immunity
TheisolatorµModuletechnologyusedwithintheLTM2894
hasbeenindependentlyevaluated,andsuccessfullypassed
the RF and magnetic field immunity testing requirements
per European Standard EN 55024, in accordance with the
following test standards:
EN 61000-4-3 Radiated, Radio-Frequency, Electromag-
netic Field Immunity
EN 61000-4-8 PowerFrequencyMagneticFieldImmunity
EN 61000-4-9 Pulsed Magnetic Field Immunity
Tests were performed using an unshielded test card de-
signed per the data sheet PCB layout recommendations.
Specific limits per test are detailed in Table 2.
Table 2. Test Frequency Field Strength
EN 61000-4-3, Annex D, 80MHz to 1GHz
1.4MHz to 2GHz
2GHz to 2.7GHz
10V/m
3V/m
1V/m
EN 61000-4-8, Level 4 50Hz and 60Hz
30A/m
EN 61000-4-8, Level 5 60Hz
100A/m*
EN 61000-4-9, Level 5 Pulse
1000A/m
*Non-IEC Method



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