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SST29SF040 Datasheet(PDF) 14 Page - Silicon Storage Technology, Inc |
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SST29SF040 Datasheet(HTML) 14 Page - Silicon Storage Technology, Inc |
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14 / 25 page ![]() 14 Data Sheet 2 Mbit / 4 Mbit Small-Sector Flash SST29SF020 / SST29SF040 SST29VF020 / SST29VF040 ©2005 Silicon Storage Technology, Inc. S71160-13-000 10/06 FIGURE 10: WE# CONTROLLED CHIP-ERASE TIMING DIAGRAM FIGURE 11: Software ID Entry and Read 1160 F09.1 ADDRESS AMS-0 DQ7-0 WE# SW0 SW1 SW2 SW3 SW4 SW5 555 2AA 2AA 555 555 55 10 55 AA 80 AA 555 OE# CE# SIX-BYTE CODE FOR CHIP-ERASE TSCE TWP Note: This device also supports CE# controlled Chip-Erase operation The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 11) AMS = Most significant address AMS = A17 for SST29SF/VF020 and A18 for SST29SF/VF040 1160 F10.1 ADDRESS A14-0 DQ7-0 WE# SW1 SW0 SW2 Device ID 555 2AA 555 0000 0001 OE# CE# Three-Byte Sequence for Software ID Entry TWP TWPH TAA BF 55 AA 90 TIDA Note: Device ID = 24H for SST29SF020, 13H for SST29SF040 25H for SST29VF020, 14H for SST29VF040 |
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