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AD5673R Datasheet(PDF) 26 Page - Analog Devices

Part # AD5673R
Description  16-Channel, 12-/16-Bit nanoDAC with 2 ppm/°C Voltage Reference TC, I2C Interface
PDF  31 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5673R Datasheet(HTML) 26 Page - Analog Devices

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AD5673R/AD5677R
Data Sheet
Rev. 0 | Page 26 of 31
The next two bytes read back are the contents of DAC Input
Register x + 1, and the next bytes read back are the contents of
DAC Input Register x + 2. Data is read from the DAC input
registers in this auto-incremented fashion until a no
acknowledge followed by a stop condition follows. If the contents
of DAC Input Register 15 are read out, the next two bytes of
data read are the contents of DAC Input Register 0.
FRAME 2
COMMAND BYTE
FRAME 1
SLAVE ADDRESS
1
9
9
1
SCL
START BY
MASTER
ACK BY
AD5673R/AD5677R
ACK BY
AD5673R/AD5677R
SDA
R/W
DB23
A0
A1
1
0
0
0
1
DB22 DB21
DB20
DB19 DB18
DB17
DB16
1
9
9
1
ACK BY
AD5673R/AD5677R
ACK BY
AD5673R/AD5677R
FRAME 4
LEAST SIGNIFICANT
DATA BYTE
FRAME 3
MOST SIGNIFICANT
DATA BYTE
STOP BY
MASTER
SCL
(CONTINUED)
SDA
(CONTINUED)
DB15 DB14
DB13 DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Figure 59. I2C Write Operation
FRAME 2
COMMAND BYTE
FRAME 1
SLAVE ADDRESS
1
1
0
0
0
1
A1
A0
R/W
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
9
9
1
START BY
MASTER
ACK BY
AD5673R/AD5677R
ACK BY
AD5673R/AD5677R
SCL
SDA
1
9
9
1
1
9
9
1
ACK BY
AD5673R/AD5677R
ACK BY
AD5673R/AD5677R
ACK BY
AD5673R/AD5677R
REPEATED START BY
MASTER
ACK BY
MASTER
FRAME 6
MOST SIGNIFICANT
DATA BYTE n
FRAME 5
SLAVE ADDRESS
ACK BY
MASTER
NACK BY
MASTER
STOP BY
MASTER
FRAME 8
MOST SIGNIFICANT
DATA BYTE n + 1
FRAME 7
SLAVE ADDRESS
LEAST SIGNIFICANT DATA BYTE n
1
0
0
0
1
A1
A0
R/W
SCL
(CONTINUED)
SDA
(CONTINUED)
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB15
DB14 DB13 DB12
DB11
DB10
DB9
DB8
DB15
DB14 DB13 DB12
DB11
DB10
DB9
DB8
1
9
9
1
STOP BY
MASTER
FRAME 4
DUMMY MSB
FRAME 3
DUMMY MSB
SCL
(CONTINUED)
SDA
(CONTINUED)
SCL
(CONTINUED)
SDA
(CONTINUED)
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB15
DB14 DB13 DB12
DB11
DB10
DB9
DB8
Figure 60. I2C Read Operation



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