Data Sheet

AD5110/AD5112/AD5114

SPECIFICATIONS

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Rev. D | 6 of 28

Table 3. (Continued)

Parameter

Symbol

Test Conditions/Comments

Min

Typ1

Max

Unit

Three-State Leakage Current

−1

+1

µA

Three-State Output Capacitance3

2

pF

POWER SUPPLIES

Single-Supply Power Range

VDD

2.3

5.5

V

Logic Supply Range

VLOGIC

1.8

VDD

V

Positive Supply Current

IDD

VDD = 5 V

0.75

3.5

µA

VDD = 2.7 V

2.5

µA

VDD = 2.3 V

2.4

µA

EEMEM Store Current3, 6

IDD_NVM_STORE

2

mA

EEMEM Read Current3, 7

IDD_NVM_READ

320

µA

Logic Supply Current

ILOGIC

VIH = VLOGIC or VIL = GND

30

nA

Power Dissipation8

PDISS

VIH = VLOGIC or VIL = GND

5

µW

Power Supply Rejection3

PSR

∆VDD/∆VSS = 5 V ± 10%

RAB = 5 kΩ

−43

dB

RAB =10 kΩ

−50

dB

RAB = 80 kΩ

−64

dB

DYNAMIC CHARACTERISTICS3, 9

Bandwidth

BW

−3 dB, code = half scale

RAB = 5 kΩ

4

MHz

RAB = 10 kΩ

2

MHz

RAB = 80 kΩ

200

kHz

Total Harmonic Distortion

THD

VA = VDD/2 + 1 V rms, VB = VDD/2, f

= 1 kHz, code = half scale

RAB = 5 kΩ

−75

dB

RAB = 10 kΩ

−80

dB

RAB = 80 kΩ

−85

dB

VW Settling Time

ts

VA = 5 V, VB = 0 V, ±0.5 LSB error

band

µs

RAB = 5 kΩ

2.5

µs

RAB = 10 kΩ

3

µs

RAB = 80 kΩ

10

µs

Resistor Noise Density

eN_WB

Code = half scale, TA = 25°C, f =

100 kHz

RAB = 5 kΩ

7

nV/√Hz

RAB = 10 kΩ

9

nV/√Hz

RAB = 80 kΩ

20

nV/√Hz

FLASH/EE MEMORY RELIABILITY3

Endurance10

TA = 25°C

1

MCycles

100

kCycles

Data Retention11

50

Years

1 Typical values represent average readings at 25°C, VDD = 5 V, VSS = 0 V, and VLOGIC = 5 V.

2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions.

R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to 0.75 × VDD/RAB.

3 Guaranteed by design and characterization, not subject to production test.

4 INL and DNL are measured at VWB with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits of

±1 LSB maximum are guaranteed monotonic operating conditions.

5 Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.