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AD5116 Datasheet(PDF) 11 Page - Analog Devices |
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AD5116 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 28 page ![]() Data Sheet AD5110/AD5112/AD5114 ABSOLUTE MAXIMUM RATINGS analog.com Rev. D | 11 of 28 TA = 25°C, unless otherwise noted. Table 6. Parameter Rating VDD to GND –0.3 V to +7.0 V VLOGIC to GND –0.3 V to +7.0 V VA, VW, VB to GND GND − 0.3 V to VDD + 0.3 V IA, IW, IB Pulsed1 Frequency > 10 kHz RAW = 5 kΩ and 10 kΩ2 ±6 mA/d RAW = 80 kΩ2 ±1.5 mA/d Frequency ≤ 10 kHz RAW = 5 kΩ and 10 kΩ2 ±6 mA/√d RAW = 80 kΩ2 ±1.5 mA/√d Continuous RAW = 5 kΩ and 10 kΩ ±6 mA RAW = 80 kΩ ±1.5 mA Digital Inputs SDA and SCL −0.3 V to +7 V or VLOGIC + 0.3 V (whichever is less) Operating Temperature Range3 −40°C to +125°C Maximum Junction Temperature (TJ Max) 150°C Storage Temperature Range −65°C to +150°C Reflow Soldering Peak Temperature 260°C Time at Peak Temperature 20 sec to 40 sec Package Power Dissipation (TJ max − TA)/θJA 1 Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and maximum applied voltage across any two of the A, B, and W terminals at a given resistance. 2 d is the pulse duty factor. 3 Includes programming of EEPROM memory. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- ing conditions for extended periods may affect product reliability. THERMAL RESISTANCE θJA is defined by JEDEC specification JESD-51, and the value is dependent on the test board and test environment. Table 7. Thermal Resistance Package Type θJA θJC Unit 8-Lead LFCSP 901 25 °C/W 1 JEDEC 2S2P test board, still air (0 m/sec air flow). ESD CAUTION ESD (electrostatic discharge) sensitive device. Charged devi- ces and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. |
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