Data Sheet

ADN2913

Rev. B | Page 5 of 35

JITTER SPECIFICATIONS

TA = TMIN to TMAX, VCC = VCCMIN to VCCMAX, VCC1 = VCC1MIN to VCC1MAX, VDD = VDDMIN to VDDMAX, VEE = 0 V, input data

pattern: PRBS 223 − 1, ac-coupled to 100 Ω differential termination load, I2C register default settings, unless otherwise noted.

Table 2.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

PHASE-LOCKED LOOP CHARACTERISTICS

Jitter Transfer Bandwidth (BW)1

8GFC2

1242

1676

kHz

OC-48

TRANBW[2:0] = 4 (default)

663

896

kHz

OTN mode, TRANBW[2:0] = 1

157

181

kHz

OC-12

175

kHz

OC-3

44

kHz

Jitter Peaking

8GFC2

20 kHz to 80 MHz

0.004

0.021

dB

OC-48

20 kHz to 10 MHz

0.004

0.023

dB

OC-12

0.01

dB

OC-3

0.01

dB

Jitter Generation

8GFC2

Unfiltered

0.005

UI rms

Unfiltered

0.044

UI p-p

OC-48

12 kHz to 20 MHz

0.0025

UI rms

Unfiltered

0.0046

UI rms

12 kHz to 20 MHz

0.0156

UI p-p

Unfiltered

0.0276

UI p-p

OC-12

12 kHz to 5 MHz

0.0007

UI rms

Unfiltered

0.0011

UI rms

12 kHz to 5 MHz

0.0038

UI p-p

Unfiltered

0.0076

UI p-p

OC-3

12 kHz to 1.3 MHz

0.0002

UI rms

Unfiltered

0.0003

UI rms

12 kHz to 1.3 MHz

0.0008

UI p-p

Unfiltered

0.0018

UI p-p

Jitter Tolerance

TRANBW[2:0] = 4 (default)

8GFC,2 JTSPAT

Sinusoidal Jitter at 340 kHz

6.7

UI p-p

Sinusoidal Jitter at 5.098 MHz

0.53

UI p-p

Sinusoidal Jitter at 80 MHz

0.59

UI p-p

Rx Jitter Tracking Test3

Voltage modulation amplitude (VMA) = 170 mV p-p at 100 MHz,

425 mV p-p at 100 MHz, 170 mV p-p at 2.5 GHz, and 425 mV p-p

at 2.5 GHz excitation frequency4

510 kHz, 1 UI

10−12

<10−12

BER

100 kHz, 5 UI

10−12

<10−12

BER

OC-48

600 Hz

1528

UI p-p

6 kHz

378

UI p-p

100 kHz

16.6

UI p-p

1 MHz

0.70

UI p-p

20 MHz

0.63

UI p-p

OC-12

30 Hz

193

UI p-p

300 Hz

44

UI p-p

25 kHz

19.2

UI p-p

250 kHz

0.82

UI p-p

5 MHz

0.60

UI p-p