TDA4857 datasheet(17/56 Pages) PHILIPS

17 / 56 page

2000 Jan 31

Philips Semiconductors

Product speciﬁcation

I2C-bus autosync deﬂection controller for

PC monitors

TDA4857PS

HPARAL

horizontal parallelogram

correction (referenced to

horizontal period)

control bit HBC = 0; note 6

−−0.8

−

control bit HBC = 0; note 6

−

0.8

−

control bit HBC = 1; note 6

−

HMOIRE

relative modulation of

horizontal position by 0.5fH;

phase alternates with 0.5fV

control bit MOD = 0

−

control bit MOD = 0

−

0.05

−

HMOIREoff

moire cancellation off

control bit MOD = 1

−

PLL2 phase detector: pins HFLB and HPLL2

φPLL2

PLL2 control (advance of

horizontal drive with respect to

middle of horizontal ﬂyback)

maximum advance;

−−

minimum advance;

−

Ictrl(PLL2)

PLL2 control current

−

−µA

PLL2

relative sensitivity of PLL2

phase shift related to

horizontal period

−

mV/%

VPROT(PLL2)(max)

maximum voltage for PLL2

protection mode/soft start

−

4.4

−

Ich(PLL2)

charge current for external

capacitor during soft start

VHPLL2 < 3.7 V

−

−µA

HORIZONTAL FLYBACK INPUT: PIN HFLB

Vpos(HFLB)

positive clamping voltage

IHFLB =5mA

−

5.5

−

Vneg(HFLB)

negative clamping voltage

IHFLB = −1mA

−−0.75

−

Ipos(HFLB)

positive clamping current

−−

6mA

Ineg(HFLB)

negative clamping current

−−−2mA

Vsl(HFLB)

slicing level

−

2.8

−

Output stage for line driver pulses: pin HDRV

OPEN-COLLECTOR OUTPUT STAGE

Vsat(HDRV)

saturation voltage

IHDRV =20mA

−−

0.3

IHDRV =60mA

−−

0.8

ILO(HDRV)

output leakage current

VHDRV =16V

−−

µA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

TDA4857 Datasheet(PDF) 17 Page - NXP Semiconductors

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