1999 June 10

10

Philips Semiconductors

Preliminary specification

5 V spindle & VCM driver combo

TDA5345HT

FUNCTIONAL DESCRIPTION

Serial interface

The serial interface is a uni-directional port for writing data to the internal registers of TDA5345HT. Each write is

composed of 16 bits. For data transfer SEN_N is brought low, serial data is presented at SDATA pin, and a serial clock

is applied to the SCLK pin. After the SEN_N pin goes low, the first 16 pulses applied to the SCLK pin shifts the data

presented at the SDATA pin into an internal shift register on the rising edge of each clock. An internal counter prevents

more than 16 bits from being shifted into the register. The data in the shift register is latched when SEN_N goes high. If

less than 16 clock pulses are provided before SEN_N goes high, the data transfer is aborted.

All transfers are shifted into the serial port MSB first. The first 4 bits of the transfer determine the internal register to be

accessed. The other 12 bits contain the programming data. During sleep modes, the serial port remains active and

register programming data is retained.

Table 1

Address of registers

A3

A2

A1

A0

REG.

DESCRIPTION

000

0

0

clock dividers programmation, spindle mode control

000

1

1

start-up,comdelim & watch-dog delays

001

0

2

blank delay, bandgap adjust, 3-step retract param (begin)

001

1

3

3-step retract parameters (end)

010

0

4

fly-back slope, shock sensor threshold & sleep control bits

010

1

5

speed factor (MSBs), PLL control and 6-bit DAC

011

0

6

speed factor(LSBs)

011

1

7

Vcm 12-bit DAC (low gain)

100

0

8

Vcm 12-bit DAC (high gain)

1

0

0

1

9

shock sensor threshold

SDATA

A3

A2

A1

A0

D11 D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Write to TDA5345HT

SEN_N

SCLK

Receive data

Address

Fig.6 Serial port timing information.

1

2

3

4

5

6

78

9

10

11

12

13

14

15

16