TC1270/TC1271

DS21381D-page 6

© 2007 Microchip Technology Inc.

4.0

APPLICATIONS INFORMATION

4.1

The

TC1270/TC1271

provides

accurate

monitoring and Reset timing during power-up,

power-down, and brownout/sag conditions, and rejects

negative-going transients (glitches) on the power

supply line. Figure 4-3 shows the maximum transient

duration vs. maximum negative excursion (overdrive)

for glitch rejection. Any combination of duration and

overdrive that lays under the curve will not generate a

Reset signal. Combinations above the curve are

detected as a brown-out or power-down. Transient

immunity can be improved by adding a capacitor in

FIGURE 4-1:

Maximum Transient

Duration vs. Overdrive for Glitch Rejection at

+25°C.

4.2

Reset Signal Integrity During

Power-Down

Below this voltage the output becomes an “open circuit”

and does not sink current. This means CMOS logic

inputs to the microprocessor will be floating at an

undetermined voltage. Most digital systems are

completely shut down well above this voltage.

However, in situations where RESET must be

be connected from RESET to ground to discharge stray

capacitances and hold the output low (Figure 4-2). This

resistor value, though not critical, should be chosen

such that it does not appreciably load RESET under

normal operation

(100 k

Ω will be suitable for most

required for the TC1271 to ensure a valid high RESET

FIGURE 4-2:

Ensuring RESET Valid to

4.3

Processors With Bidirectional

I/O Pins

Some microprocessor’s (such as Motorola 68HC11)

have bidirectional Reset pins. Depending on the

current drive capability of the processor pin, an indeter-

minate logic level may result if there is a logic conflict.

This can be avoided by adding a 4.7 k

Ω resistor in

series with the output of the TC1270/TC1271

(Figure 4-3). If there are other components in the sys-

tem which require a Reset signal, they should be buff-

ered so as not to load the Reset line. If the other

components are required to follow the Reset I/O of the

microprocessor, the buffer should be connected as

shown with the solid line.

FIGURE 4-3:

Interfacing to Bidirectional

Reset I/O.

RESET COMPARATOR OVERDRIVE,

400

240

160

320

80

0

1

10

100

1000

Duration

Overdrive

TC127LMJ

TC127xR/S/T

TC1270

R1

100k

RESET

GND

TC1270

RESET

GND

RESET

GND

Buffered RESET

To Other System

Components

Buffer

μP

4.7k