M66239FP datasheet(4/24 Pages) RENESAS

4 / 24 page

M66239FP

Rev.1.00 Mar 16, 2005 page 4 of 23

Pin Description

Pin Name

I/O

Function

MCLK

Input clock.

SCLK

Serial resister clock input.

SENABLE

Serial resister enable input.

H level: disable, L level: enable

SDATAIN

Serial resister data input.

RESET

System reset input. When set to "L", system reset function.

Reset function initialize all resister data to the default settings.

FSET<2:0>

Frequency range settings correspond to MCLK frequency.

MODE

Trigger edge polarity (positive/negative) select.

H level: negative edge mode, L level: positive edge mode

Trigger input for clock outputs.

CLKO

Continuous clock output. CLKO is asynchronous clock output to trigger.

CKO

Sync. clock output. Synchronized with trigger signal.

CKOB

Sync. clock output. Synchronized with trigger signal.

CKOB is inverted clock of CKO.

PULSE

Sync. clock output. Synchronized with trigger signal.

PULSE is one-shot pulse synchronized with CKO.

SDATAOUT

Serial resister data output.

Output enable control.

H level: CKOB and PULSE will be disabled.

L level: All clock outputs will be enabled.

TEST<7:0>

Test control input. Set to "L".

TESTP<4:1>

TESTN<4:1>

Test control input. Set to open.

DVCC

DGND

Digital block VDD and GND.

AVCC

AGND

Analog block VDD and GND.

PLL VCC

PLL GND

PLL block VDD and GND.

DAC VCC

DAC GND

DA converter VDD and GND.

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