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CDCE949PW Datasheet(PDF) 12 Page - Texas Instruments |
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CDCE949PW Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 31 page ![]() Generic Programming Sequence 1 7 1 1 8 1 1 S Slave Address A DataByte A P MSB LSB MSB LSB S StartCondition Sr RepeatedStartCondition 1=Read(Rd)fromCDCE9xxdevice;0=Write(Wr)totheCDCE9xxx A Acknowledg(ACK=0andNACK=1) P StopCondition MastertoSlave Transmission SlavetoMaster Transmission R/W R/W Byte Write Programming Sequence 1 7 1 1 8 1 1 1 S Slave Address Wr A A A P DataByte CommandCode 8 Byte Read Programming Sequence 1 7 1 1 1 1 1 1 S Slave Address Wr A A S Rd A 8 1 1 DataByte A P CommandCode 8 7 Slave Address Block Write Programming Sequence 1 7 1 1 1 1 S Slave Address Wr A A A 8 1 1 1 1 DataByte0 A A A P 8 DataByteN-1 … 8 DataByte1 8 CommandCode ByteCount=N 8 CDCE949 CDCEL949 SCAS844 – JUNE 2007 Table 6. Command Code Definition BIT DESCRIPTION 0 = Block Read or Block Write operation 7 1 = Byte Read or Byte Write operation (6:0) Byte Offset for Byte Read, Block Read, Byte Write and Block Write operation. Figure 7. Generic Programming Sequence Figure 8. Byte Write Protocol Figure 9. Byte Read Protocol NOTE: Data Byte 0 Bits [7:0] is reserved for Revision Code and Vendor Identification. Also it is used for internal test purpose and should not be overwritten. Figure 10. Block Write Programming 12 Submit Documentation Feedback |
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