TDA9143 datasheet(12/40 Pages) PHILIPS

12 / 40 page

1996 Jan 17

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled, alignment-free

PAL/NTSC/SECAM decoder/sync processor

TDA9143

Output port and in/output port

Two stand-alone ports are available for external use.

These ports are I2C-bus controlled, the output port by bus

bit OPB and the input/output port by bus bit OPA. Bus bit

OPA is an open-drain output, to enable input port

functionality. The pin status is read out by bus via output

bit IP.

Sandcastle

Figure 7 illustrates the timing of the acquisition sandcastle

(ASC) and the VA pulse with respect to the input signal.

The sandcastle signal is according to the two-level 5 V

sandcastle format. An external vertical guard current can

overrule the sink current to enable blanking purposes.

handbook, full pagewidth

MBG902

ASC

625

312

(1)

262

525

280

50 Hz

60 Hz

2nd FIELD

1st FIELD

336

2nd FIELD

1st FIELD

2nd FIELD

1st FIELD

2nd FIELD

1st FIELD

Fig.7 Acquisition sandcastle signal and VA pulse timing diagram.

(1) See Vertical Section in “Characteristics”

TDA9143 Datasheet(PDF) 12 Page - NXP Semiconductors