TDA9143 datasheet(15/40 Pages) PHILIPS

15 / 40 page

1996 Jan 17

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled, alignment-free

PAL/NTSC/SECAM decoder/sync processor

TDA9143

Table 15 Enable fast switch

Table 16 External RGB clamp mode

Table 17 Forced RGB mode

Table 18 YUV outputs as a function of EFS, FRGB and

Fast switch F

Table 19 Hue

Table 20 Line-locked clock active

Table 21 Forced wide window

EFS

CONDITION

fast switch disabled

fast switch enabled, when FRGB = 0

ECL

CONDITION

off; internal clamp pulse is used

on; external clamp pulse has to be supplied

to CLP pin

FRGB

CONDITION

YUV, when disabled via EFS

forced RGB

EFS

FRGB

SELECTED INPUTS

−

YUV

−

RGB

100

YUV

101

RGB

FUNCTION

ADDRESS

DIGITAL NUMBER

Hue

HU5 to HU0

000000 =

−45°

111111 = +45

LCA

CONDITION

OPB/CLP mode

LLC/HA mode

FWW

CONDITION

auto window mode

forced wide window

Table 22 PALplus/EDTV-2 helper blanking (Y, U, V)

Table 23 Blanked sync on Yout

Table 24 Baseband delay line bypass; note 1.

Note

1. SECAM cannot be bypassed.

Table 25 Low power standby mode

Table 26 Enable MACROVISION gating

Table 27 Luminance delay control

HOB

HBC

SNR

BLANKING

−−

off

−

110

off

111

BSY

CONDITION

unblanked sync

blanked sync

BPS

CONDITION

no bypass

baseband delay line bypassed

LPS

CONDITION

normal operation

low power standby

EMG

CONDITION

disable gating

enable gating

YD3 to YD0

CONDITION

0000

−280 ns

1111

+160 ns

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