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38D5 Datasheet(PDF) 59 Page - Renesas Technology Corp |
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38D5 Datasheet(HTML) 59 Page - Renesas Technology Corp |
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59 / 141 page ![]() Rev.3.01 Aug 08, 2007 Page 59 of 134 REJ03B0158-0301 38D5 Group CLOCK OUTPUT FUNCTION A system clock φ can be output from I/O port P72. The triple function of I/O port, timer 2 output function and system clock φ output function are controlled by the clock output control register (address 0FF316) and the timer 2 output selection bit of the timer 12 mode register (address 002516). In order to output a system clock φ from I/O port P72, set the timer 2 output selection bit to “1” and P72 clock output control bits of the clock output control register to “01”. In order to output the same signal as oscillation frequency of sub clock XCIN, set the P72 clock output control bits to “10”. When the clock output function is selected, a clock is output while the direction register of port P72 is set to the output mode. P72 is switched to the port output or the output (timer 2 output or the clock output) except port at the cycle after the timer 2 output selection bit is switched. Fig. 54 Structure of clock output control register Fig. 55 Block diagram of Clock output function Other function registers [RRF register (RRFR)] The RRF register (address 001216) is the 8-bit register and does not have the control function. As for the value written in this register, high-order 4 bits and low-order 4 bits interchange. It is initialized after reset. Fig. 56 Structure of RRF register b7 b0 Clock output control register (CKOUT : address 0FF316) P72 clock output control bits b1b0 0 0: Timer 2 output 0 1: φ frequency signal output 1 0: XCIN frequency signal output 1 1: Not available Not used (returns “0” when read) Timer 2 latch (8) Timer 2 (8) 1/2 Q Q S T T2OUT output edge switch bit “0” “1” P72 latch Timer 2 output selection bit P72 direction register P72/T2OUT/CKOUT b7 b0 Timer 12 mode register (address 002516) T12M Timer 2 output selection bit 0 : I/O port 1 : Timer 2 output System clock φ Timer 2 output selection bit XCIN “00” “01” “10” P72 clock output control bits b7 b0 RRF register DB4 data storage DB5 data storage DB6 data storage DB7 data storage DB0 data storage DB1 data storage DB2 data storage DB3 data storage (RRFR : address 001216) |
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