TDA9850 datasheet(13/32 Pages) PHILIPS

13 / 32 page

1995 Jun 19

Philips Semiconductors

Preliminary speciﬁcation

I2C-bus controlled BTSC stereo/SAP decoder

TDA9850

SAP output

output impedance

−

120

Ω

DC output voltage

−

0.5VCC−1.5 −

output load resistance

(AC-coupled)

−−

Ω

output load capacitance

−−

2.5

Vo(rms)

nominal output voltage

(RMS value)

150

µs de-emphasis

see Fig.3

Outputs OUTL and OUTR

Vo(rms)

nominal output voltage

(RMS value)

100% modulation

−

500

−

HEADo

output headroom

−−

output impedance

−

120

Ω

DC output voltage

0.45VCC−1.5 0.5VCC−1.5 0.55VCC−1.5 V

output load resistance

(AC-coupled)

−−

Ω

output load capacitance

−−

2.5

crosstalk L, R into SAP

100% modulation;

fi = 1 kHz; L or R;

mode selector switched

to SAP/SAP

−

crosstalk SAP into L, R

100% modulation;

fi = 1 kHz; SAP;

mode selector switched

to stereo

−

∆V

ST-SAP

output voltage difference

if switched from L, R to

SAP

250 Hz to 6.3 kHz

−−

3dB

Dbx noise reduction circuit

tadj

stereo adjustment time

see Section “Adjustment

procedure”

−−

nominal timing current for

nominal release rate of

spectral RMS detector

Is can be measured at pin

CTS via current meter

connected to

⁄2VCC + 0.25 V

−

−µA

∆Is

spread of timing current

−15

−

+15

Is range

timing current range

7 steps via I2C-bus

−±30

−

timing current for release

rate of wideband RMS

detector

−

⁄3Is

−µA

Relrate

nominal RMS detector

release rate

nominal timing current

and external capacitor

values

wideband

−

125

−

dB/s

spectral

−

381

−

dB/s

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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