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TDA9853 Datasheet(PDF) 3 Page - NXP Semiconductors |
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TDA9853 Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 28 page ![]() 2000 Dec 11 3 Philips Semiconductors Product specification I2C-bus controlled economic BTSC stereo decoder and audio processor TDA9853H QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 7.8 8 9 V ICC supply current 25 33 45 mA Vo(rms) output voltage (RMS value) composite input voltage 250 mV (RMS) for 100% modulation L + R (25 kHz deviation); fmod = 300 Hz − 500 − mV α csL,R stereo channel separation L and R 14% modulation; fL = 300 Hz; fR = 3 kHz 15 20 − dB THDL,R total harmonic distortion L and R 100% modulation L or R; fmod = 1 kHz − 0.2 1 % S/N signal-to-noise ratio at line out and at AF output mono via I2C-bus; referenced to 500 mV output signal; volume 0 dB CCIR 468-2 weighted; quasi peak 50 60 − dB DIN noise weighting filter (RMS value) − 73 − dBA VI, O(rms) signal handling (RMS value) THD < 0.5% 2 −− V AVL AVL control range −15 − +6 dB Gc volume control range −63 − +12 dB Llinear linear tone control − 0 − dB Lbass(max) tone control with maximum bass referenced to linear position; fmod =20Hz 10 12 − dB Lbass(min) tone control with minimum bass referenced to linear position; fmod =20Hz 3.5 5 − dB Ltreble(max) tone control with maximum treble referenced to linear position; fmod =20kHz 68 − dB Ltreble(min) tone control with minimum treble referenced to linear position; fmod =20kHz −−1.5 − dB |
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