RH118

3

Rev. E

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TOTAL DOSE BIAS CIRCUIT

TABLE 2: ELECTRICAL TEST REQUIREMENTS

ELECTRICAL CHARACTERISTICS

Note 1: The inputs are shunted with back-to-back Zeners for overvoltage

protection. Excessive current will flow if a differential voltage greater than

5V is applied to the inputs.

Note 2: For supply voltages less than ±15V, the maximum input voltage is

equal to the supply voltage.

Note 3: These specifications apply for ±5V ≤ VS ≤ ±20V. The power

supplies must be bypassed with a 0.1µF or greater disc capacitor within

four inches of the device.

Note 4: Guaranteed by design, characterization or correlation to other

tested parameters.

Note 5: Slew rate is 100% tested at wafer probe testing. It is QA sample

tested in finished package form.

Note 6: TA = 25°C, VS = ±20V, VCM = 0V, unless otherwise specified.

Supply bypassed per Note 3.

–

+

15V

8V

–15V

0.1µF

0.1µF

RH118 TDBC

2

3

10k

4

6

7

10k

MIL-PRF-38535 TEST REQUIREMENTS

SUBGROUP

Final Electrical Test Requirements

1*, 2, 3, 4, 5, 6

Group A Test Requirements

1, 2, 3, 4, 5, 6

Group C End Point Electrical Parameters

1, 2, 3

Group D End Point Electrical Parameters

1, 2, 3

Group E End Point Electrical Parameters

1

*PDA Applies to subgroup 1. See PDA Test Notes.

PDA Test Notes

The PDA is specified as 5% based on failures from group A, subgroup

1, tests after cooldown as the final electrical test in accordance with

method 5004 of MIL-STD-883 Class B. The verified failures (including

Delta parameters) of group A, subgroup 1, after burn-in divided by the

total number of devices submitted for burn-in in that lot shall be used to

determine the percent for the lot.

Analog Devices reserves the right to test to tighter limits than those given.

(Continued)

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

C

04/19

Obsolete H + J Package and updating to ADI format

1-4

D

07/23

Updated art title in the Electrical Characteristics section

2

E

06/24

Changed Electrical Test Requirements, Table 2

3