UDA1350ATS datasheet(17/32 Pages) PHILIPS

17 / 32 page

2000 Mar 29

Philips Semiconductors

Preliminary speciﬁcation

IEC 958 audio DAC

UDA1350ATS

8.6.8

WRITABLE REGISTERS

8.6.8.1

Restoring L3 defaults

By writing to the 7FH register, all L3 control values are

restored to their default values. Only the L3 interface is

affected, the system will not be reset. Consequently

readable registers, which are not reset, can be affected.

8.6.8.2

Power-on

A 1-bit value to switch the DAC on and off.

Table 10 Power-on setting

8.6.8.3

Filter mode selection

A 2-bit value to program the mode for the sound

processing filters of bass boost and treble.

Table 11 Filter mode settings

8.6.8.4

Treble

A 2-bit value to program the treble setting in combination

with the filter mode settings. At fs = 44.1 kHz the −3dB

point for minimum setting is 3.0 kHz and the

−3 dB point

for maximum setting is 1.5 kHz. The default value is ‘00’.

Table 12 Treble settings

8.6.8.5

Bass boost

A 4-bit value to program the bass boost setting in

combination with the filter mode settings. At fs = 44.1 kHz

the

−3 dB point for minimum setting is 250 Hz and the

−3 dB point for maximum setting is 300 Hz. The default

value is ‘0000’.

Table 13 Bass boost settings

8.6.8.6

De-emphasis

A 2-bit value to enable the digital de-emphasis filter.

Table 14 De-emphasis selection

PON

FUNCTION

power-down

power-on (default setting)

FUNCTION

ﬂat (default setting)

minimum

maximum

TR1

TR0

LEVEL (dB)

FLAT

MIN.

MAX.

00000

01022

10044

11066

BB3

BB2

BB1

BB0

LEVEL (dB)

FLAT

MIN.

MAX.

0000000

0001022

0010044

0011066

0100088

01010

01100

01110

10000

10010

10100

10110

11000

11010

11100

11110

DE1

DE0

FUNCTION

other (default setting)

fs = 32.0 kHz

fs = 44.1 kHz

fs = 48.0 kHz

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