UDA1350ATS datasheet(19/32 Pages) PHILIPS

19 / 32 page

2000 Mar 29

Philips Semiconductors

Preliminary speciﬁcation

IEC 958 audio DAC

UDA1350ATS

8.6.9

READABLE REGISTERS

8.6.9.1

Mute status

A 1-bit value indicating whether the interpolator is muting

or not muting.

Table 19 Interpolator mute status

8.6.9.2

PLL lock detection

A 1-bit value indicating that the clock regeneration is

locked.

Table 20 PLL lock indication

8.6.9.3

SPDIF lock detection

A 1-bit value indicating the IEC 958 decoder is locked and

is decoding correct data.

Table 21 SPDIF lock detection

8.6.9.4

Audio sample frequency detection

A 2-bit value indicating the audio sample frequency of the

IEC 958 input signal.

Table 22 Audio sample frequency detection

8.6.9.5

PCM detection

A 1-bit value which indicates whether the IEC 958 input

contains PCM audio data or other binary data.

Table 23 Two channel PCM input detection

8.6.9.6

Pre-emphasis detection

A 1-bit value which indicates whether the pre-emphasis bit

was set on the IEC 958 input signal or not set.

Table 24 Pre-emphasis detection

8.6.9.7

Clock accuracy detection

A 2-bit value indicating the timing accuracy of the IEC 958

input signal is conforming to the IEC 958 specification.

Table 25 Input signal accuracy detection

MT stat

FUNCTION

no muting

muting

PLL lock

FUNCTION

out-of-lock

locked

SPD lock

FUNCTION

not locked or non-PCM data detected

locked and PCM data detected

ASF1

ASF0

FUNCTION

44.1 kHz

undeﬁned

48.0 kHz

32.0 kHz

PCM stat

FUNCTION

input with two channel PCM data

input without two channel PCM data

PRE

FUNCTION

no pre-emphasis

pre-emphasis

ACC1

ACC0

FUNCTION

level II

level I

level III

undeﬁned

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