2000 Mar 29

21

Philips Semiconductors

Preliminary specification

IEC 958 audio DAC

UDA1350ATS

Notes

2. When the DAC must drive a higher capacitive load (above 50 pF), then a series resistor of 100

Ω must be used in

order to prevent oscillations in the output stage of the operational amplifier.

3. The output voltage of the DAC is proportional to the DAC power supply voltage.

Digital input pins

HIGH-level input voltage

−

LOW-level input voltage

−0.5

−

V

hysteresis voltage on

pin RESET

−

0.8

−

V

I

input leakage current

−−

10

µA

input capacitance

−−

10

pF

internal pull-up resistance

16

33

78

k

Ω

internal pull-down resistance

16

33

78

k

Ω

Digital output pins

HIGH-level output voltage

−−

V

LOW-level output voltage

−−

0.4

V

maximum load current

−

3

−

mA

Digital-to-analog converter; note 2

reference voltage

measured with respect to

output voltage (RMS value)

note 3

−

900

−

mV

(THD + N)/S total harmonic

distortion-plus-noise to signal

ratio

at 0 dB

−−90

−85

dB

at

−40 dB; A-weighted

−−60

−55

dB

S/N

signal-to-noise ratio

A-weighted

95

100

−

dB

α

cs

channel separation

−

96

−

dB

∆V

o

unbalance of output voltages

−

0.1

0.4

dB

IEC 958 input

AC input voltage (peak-to-peak

value)

0.2

0.5

3.3

V

input resistance

−

6

−

k

Ω

hysteresis voltage

−

40

−

mV

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT