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CS42428 Datasheet(PDF) 58 Page - Cirrus Logic

Part # CS42428
Description  114 dB, 192 kHz 8-Ch Codec with PLL
PDF  73 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42428 Datasheet(HTML) 58 Page - Cirrus Logic

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58
DS605F1
CS42428
6.21.2 CHANNEL MUTES SELECT (M_AOUTXX)
Default = 11111
0 - Channel mute is not mapped to the MUTEC pin
1 - Channel mute is mapped to the MUTEC pin
Function:
Determines which channel mutes will be mapped to the MUTEC pin. If no channel mute bits are
mapped, then the MUTEC pin is driven to the “active” state as defined by the POLARITY bit. These
Channel Mute Select bits are “ANDed” together in order for the MUTEC pin to go active. This means
that if multiple Channel Mutes are selected to be mapped to the MUTEC pin, all corresponding chan-
nels must be muted before the MUTEC will go active.
6.22
General-Purpose Pin Control (addresses 29h to 2Fh)
6.22.1 MODE CONTROL (MODEX)
Default = 00
00 - Reserved
01 - Mute Mode
10 - GPO/Overflow Mode
11 - GPO, Drive High Mode
Function:
Mute Mode - The pin is configured as a dedicated mute pin. The muting function is controlled by the
Function bits.
GPO, Drive Low / ADC Overflow Mode - The pin is configured as a general-purpose output driven low
or as a dedicated ADC overflow pin indicating an over-range condition anywhere in the ADC signal
path for either the left or right channel. The Functionx bits determine the operation of the pin. When
configured as a GPO with the output driven low, the driver is a CMOS driver. When configured to iden-
tify an ADC Overflow condition, the driver is an open drain driver requiring a pull-up resistor.
GPO, Drive High Mode - The pin is configured as a general purpose output driven high.
6.22.2 POLARITY SELECT (POLARITY)
Default = 0
Function:
Mute Mode - If the pin is configured as a dedicated mute output pin, the polarity bit determines the
polarity of the mapped pin according to the following
0 - Active low
1 - Active high
GPO, Drive Low / ADC Overflow Mode - If the pin is configured as a GPO, Drive Low / ADC Overflow
Mode pin, the polarity bit is ignored. It is recommended that in this mode this bit be set to 0.
GPO, Drive High - If the pin is configured as a general-purpose output driven high, the polarity bit is
ignored. It is recommended that in this mode this bit be set to 0.
76
543
21
0
Mode1
Mode0
Polarity
Function4
Function3
Function2
Function1
Function0



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