DVIULC6-4SC6 datasheet(4/12 Pages) STMICROELECTRONICS

Part #	DVIULC6-4SC6

Description	Ultra low capacitance ESD protection

PDF	12 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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4 / 12 page

1 Surge protection

DVIULC6-4SC6

4/12

Technical information

Surge protection

The DVIULC6-4SC6 is particularly optimized to perform ESD surge protection based on the rail

to rail topology.

The clamping voltage VCL can be calculated as follow:

with: VF = VT + Rd.Ip

(VF forward drop voltage) / (VT forward drop threshold voltage)

We assume that the value of the dynamic resistance of the clamping diode is typically:

Rd = 1.4 Ω and VT = 1.2 V.

For an IEC61000-4-2 surge Level 4 (Contact Discharge: Vg=8 kV, Rg=330 Ω), VBUS = +5 V, and

if in first approximation, we assume that: Ip = Vg / Rg = 24 A.

So, we find:

Note:

The calculations do not take into account phenomena due to parasitic inductances.

VCL+ = VBUS + VF

for positive surges

VCL- = - VF

for negative surges

VCL+ = +39 V

VCL- = -34 V

DVIULC6-4SC6 Datasheet(PDF) 4 Page - STMicroelectronics