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LPC55S2X Datasheet(PDF) 103 Page - NXP Semiconductors

Part # LPC55S2X
Description  32-bit Arm Cortex®-M33 microcontroller
PDF  132 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC55S2X Datasheet(HTML) 103 Page - NXP Semiconductors

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NXP Semiconductors
LPC55S2x/LPC552x
32-bit Arm Cortex®-M33 microcontroller
The internal pull-up (1.5 kW) can be enabled by setting the DCON bit in the DEVCMDSTAT register to prevent
the USB from timing out when there is a significant delay between power-up and handling USB traffic. External
circuitry is not required.
REGULATOR
VBUS
LPCxxxx
R1
R2
R3
1.5 κΩ
USB-B
connector
USB_DP
USB_DM
VSS
USB_VBUS(2)
USB_VBUS(1)
USB
USB_CONNECT
D+
D-
RS = 33 Ω
RS = 33 Ω
VBAT_DCDC/VBAT_
PMU/VDD/USB_3V3
Figure 31. USB interface on a bus-powered device
Two options exist for connecting VBUS to the USB_VBUS pin:
• Connect the regulator output to USB_VBUS. In this case, the USB_VBUS signal is HIGH whenever the part is
powered.
• Connect the VBUS signal directly from the connector to the USB_VBUS pin. In this case, 5 V are applied
to the USB_VBUS pin while the regulator is ramping up to supply VDD. Since the USB_VBUS pin is only 5
V tolerant when VDD is at operating level, this connection can degrade the performance of the part over its
lifetime. Simulation shows that lifetime is reduced to 15 years at Tamb = 45 °C and 8 years at Tamb = 55 °C
assuming that USB_VBUS = 5 V is applied continuously while VDD = 0 V.
13.6 USB1 High-speed VBUS threshold levels
The USB1 has the following characteristics for VBUS (see Table 46). The USB1_VBUS can tolerate an input
voltage of 5.5 V.
Function
Min
Typ
Max
Unit
Votg_sess_valid
0.8
-
4.0
V
VBUS_valid
4.192
-
5.5
V
Vadp_probe
0.6
-
0.8
V
Vadp_sense
0.20
-
0.55
V
Table 46. USB1 High-speed VBUS threshold levels
LPC55S2X_LPC552X
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Data sheet
Rev. 2.3 — 29 August 2024
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