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PM7351 Datasheet(PDF) 71 Page - PMC-Sierra, Inc |
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PM7351 Datasheet(HTML) 71 Page - PMC-Sierra, Inc |
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71 / 174 page ![]() RELEASED PM7351 S/UNI-VORTEX DATA SHEET PMC-1980582 ISSUE 5 OCTAL SERIAL LINK MULTIPLEXER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 61 Register 0x004: Miscellaneous Interrupt Statuses Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 R ROOLI X Bit 2 R UPCBI X Bit 1 R UCIFI X Bit 0 R DCIFI X DCIFI: This bit indicates whether there is a pending interrupt for the Downstream Cell Interface. If DCIFI is logic 1, at least one interrupt status bit within the Downstream Cell Interface Interrupt Status register that has its corresponding enable set is a logic 1. This bit is not self-clearing; it is only cleared to logic 0 by reading the Downstream Cell Interface Interrupt Status register. UCIFI: This bit indicates whether there is a pending interrupt for the Upstream Cell Interface. If UCIFI is logic 1, the interrupt status bit in the Upstream Cell Interface Configuration And Interrupt Status register has its corresponding enable set and is a logic 1. This bit is not self-clearing; it is only cleared to logic 0 by reading the Upstream Cell Interface Configuration and Interrupt Status register. UPCBI: This bit indicates whether there is a pending interrupt for the Microprocessor Cell Buffer. If UPCBI is logic 1, at least one interrupt status bit within the Microprocessor Cell Buffer Interrupt Control and Status register that has its corresponding enable set is a logic 1. This bit is not self-clearing; it is only cleared to logic 0 by reading the Microprocessor Cell Interrupt Status register. |
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