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PCA9674ATS Datasheet(PDF) 15 Page - NXP Semiconductors |
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PCA9674ATS Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 34 page ![]() PCA9674_PCA9674A_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 12 October 2006 15 of 34 NXP Semiconductors PCA9674/74A Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt 8.4 Power-on reset When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9674/74A in a reset condition until VDD has reached VPOR. At that point, the reset condition is released and the PCA9674/74A registers and I2C-bus/SMBus state machine will initialize to their default states. Thereafter VDD must be lowered below 0.2 V to reset the device. 8.5 Interrupt output (INT) The PCA9674/74A provides an open-drain interrupt (INT) which can be fed to a corresponding input of the microcontroller (see Figure 14, Figure 15, and Figure 16). This gives these chips a kind of master function which can initiate an action elsewhere in the system. An interrupt is generated by any rising or falling edge of the port inputs. After time tv(D) the signal INT is valid. The interrupt disappears when data on the port is changed to the original setting or data is read from or written to the device which has generated the interrupt. In the write mode, the interrupt may become deactivated (HIGH) on the rising edge of the write to port pulse. On the falling edge of the write to port pulse the interrupt is definitely deactivated (HIGH). The interrupt is reset in the read mode on the rising edge of the read from port pulse. During the resetting of the interrupt itself, any changes on the I/Os may not generate an interrupt. After the interrupt is reset any change in I/Os will be detected and transmitted as an INT. Fig 16. Application of multiple PCA9674s with interrupt 002aac122 VDD MICROCOMPUTER INT PCA9674 INT PCA9674 INT device 1 device 2 PCA9674 INT device 8 |
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