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PCA9674ATS Datasheet(PDF) 18 Page - NXP Semiconductors |
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PCA9674ATS Datasheet(HTML) 18 Page - NXP Semiconductors |
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18 / 34 page ![]() PCA9674_PCA9674A_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 12 October 2006 18 of 34 NXP Semiconductors PCA9674/74A Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in Figure 21, P0 and P1 are inputs, and P2 to P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P2 to P7). During a read, the logic levels of the external devices driving the input ports (P0 and P1) and the previous written logic level to the output ports (P2 to P7) will be read. The GPIO also has an interrupt line (INT) that can be connected to the interrupt logic of the microprocessor. By sending an interrupt signal on this line, the remote I/O informs the microprocessor that there is incoming data or a change of data on its ports without having to communicate via the I2C-bus. 10.2 High current-drive load applications The GPIO has a maximum sinking current of 25 mA per bit. In applications requiring additional drive, two port pins in the same octal may be connected together to sink up to 50 mA current. Both bits must then always be turned on or off together. Up to 8 pins (one octal) can be connected together to drive 200 mA. Fig 21. Bidirectional I/O expander application 002aac123 VDD temperature sensor battery status control for latch control for switch control for audio control for camera control for MP3 P0 P1 P2 P3 P4 P5 P6 P7 VDD SDA SCL INT AD0 AD1 AD2 CORE PROCESSOR VDD Fig 22. High current-drive load application 002aac124 VDD P0 P1 P2 P3 P4 P5 P6 P7 VDD SDA SCL INT AD0 AD1 AD2 CORE PROCESSOR VDD LOAD |
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