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DSP56300 Datasheet(PDF) 55 Page - Freescale Semiconductor, Inc |
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DSP56300 Datasheet(HTML) 55 Page - Freescale Semiconductor, Inc |
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55 / 108 page ![]() Algorithmic Extensions Allowing More General Branch Metrics Viterbi Decoder Implementation 4-7 For this example, we are using the same code as in Section 3 to make the unnormalized branch metrics symmetrical. For easy storage in memory, we want to generate metric pairs. Each pair should have the values needed for the upper and lower branch metric value needed for the butterfly. For this example, the branch metric for encoder output 00 will be paired with the branch metric value for 11 and the value for 01 paired with the value for 10. All branch metrics will have the previous path metric for state 0 subtracted from them. This means that after the Viterbi butterfly update, each path metric value will have been normalized. It can be shown that this limits the worst case path metric values to be no more than 12 times the maximum branch metric value (for this code example). The branch metric macro begins by reading in the last path metric for state 0. It then negates that value in accumulator a and reads the decoder input into register y. The data in y is assumed to be in the form y1:y0 mapped to real:imaginary data input. Next, the scaling factor -16 is placed in register x1. The mac instruction finds a partial branch metric by multiplying the real data by the scaling factor and adding the result to the negated path metric value in a. We also save the negated path metric value to b for later use. Next, we move the real decoder input from y1 to x0. The next mac instruction multiplies imaginary input by the scaling factor and adds it to a. The accumulator a now has the normalized branch metric for encoder 00 outputs. At the same time, the partial branch metric that was in a is saved in y1 for later use. move x,l:(r2)+ ;store 11 in location 0. move ab,l:(r2)+ ;store 01 in location 1 move ba,l:(r2)+ ;store 10 in location 2 move y,l:(r2)+ ;store 00 in location 3 move y,l:(r2)+ ;store 00 in location 4 move ba,l:(r2)+ ;store 10 in location 5 move ab,l:(r2)+ ;store 01 in location 6 move x,l:(r2)+ ;store 11 in location 7 move ba,l:(r2)+ ;store 10 in location 8 move y,l:(r2)+ ;store 00 in location 9 move x,l:(r2)+ ;store 11 in location 10 move ab,l:(r2)+ ;store 01 in location 11 move ab,l:(r2)+ ;store 01 in location 12 move x,l:(r2)+ ;store 11 in location 13 move y,l:(r2)+ ;store 00 in location 14 move ba,l:(r2)+ ;store 10 in location 15 r2-> BRX endm Example 4-2 Modified Branch Metric Generation Code (Continued) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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