Tri p ath Techn o l o g y, I n c. - T echn i cal I n fo rmation

4

TP2050– KL/1.0/07.05

TP 205 0 POW E R S T AG E PI N DE SCR I P T I ON S

Pin

Function

Description

1

GND-SUB

Substrate ground

35,36

VccSign

Signal positive supply

15

Vcc1A

Positive supply

12

Vcc1B

Positive supply

7

Vcc2A

Positive supply

4

Vcc2B

Positive supply

14

GND1A

Negative supply

13

GND1B

Negative supply

6

GND2A

Negative supply

5

GND2B

Negative supply

16,17

OUT1A

Output half bridge 1A

10,11

OUT1B

Output half bridge 1B

8,9

OUT2A

Output half bridge 2A

2,3

OUT2B

Output half bridge 2B

29

IN1A

Input of half bridge 1A

30

IN1B

Input of half bridge 1B

31

IN2A

Input of half bridge 2A

32

IN2B

Input of half bridge 2B

21,22

Vdd

5V regulator referenced to ground

33,34

Vss

5V regulator referenced to Vcc

25

PWRDN

Stand-by pin

26

TRI-STATE

Hi-Z pin

27

FAULT

Fault output

24

CONFIG

Config input

28

TH-WAR

Thermal warning output

19

GND-clean

Logic ground

23

IBIAS

Logic threshold setting pin

18

NC

Not connected

20

GND-Reg

Ground for Vdd regulator

TP205 0 POW E R STAG E PINOUT

(Top view with heat slug up)

OUT2B

OUT2B

VCC2B

GND2B

GND2A

VCC2A

OUT2A

OUT2A

OUT1B

OUT1B

VCC1B

GND1B

GND1A

VCC1A

OUT1A

OUT1A

NC

GNDSUB

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

GNDCLEAN

GNDREG

IBIAS

CONFIG

PWRDN

TRISTATE

FAULT

TH_WAR

IN1A

IN1B

IN2A

IN2B

VSS

VSS

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36