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440SP Datasheet(PDF) 57 Page - Applied Micro Circuits Corporation |
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440SP Datasheet(HTML) 57 Page - Applied Micro Circuits Corporation |
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57 / 85 page ![]() PowerPC 440SP Embedded Processor Revision 1.23 - Sept 26, 2006 AMCC Proprietary 57 Data Sheet PCIX0M66En Capable of 66MHz operation. I 3.3V PCI or 1.5V PCI for mode 2 PCIX1:2M66En Capable of 66MHz operation. I 3.3V PCI or 1.5V PCI for mode 2 5 PCIX0:2Par/PCIX0:2ECC0 Even parity indicator or ECC0. Normally used to indicate even parity across PCIAD31:00 and BE3:0. Used as ECC0 for PCIX0:2 mode 2. I/O 3.3V PCI or 1.5V PCI for mode 2 PCIX0:1Par64/PCIX0:1ECC7 Even parity indicator or ECC7. Normally used to indicate even parity across PCIAD63:32 and BE7:4 for PCI0 and PCI1. or Used as ECC7 for PCIX0:1 mode 2. I/O 3.3V PCI or 1.5V PCI for mode 2 PCIX0:2PErr Reports data parity errors during all PCI transactions except a Special Cycle. I/O 3.3V PCI 4 PCIX0:2Req0:1 PCIX0:1Req2:3 An indication to the PCI-X arbiter that the specified agent wishes to use the bus. When using an external PCI/PCI-X arbiter, connect the external arbiter's Request line to this signal. I/O 3.3V PCI 4 PCIX0:1Req64/PCIX0:1ECC6 Request 64-bit transfer or ECC6. Normally used by the current bus master to indicate a 64-bit transfer. or Used as ECC6 for PCIX2 mode 2. I/O 3.3V PCI or 1.5V PCI for mode 2 4 PCIX0:2Reset Sets PCI device registers and logic to a consistent state. O 3.3V PCI PCIX0:2SErr Reports address parity errors, data parity errors on the Special Cycle command, or other catastrophic system errors. I/O 3.3V PCI 4 PCIX0:2Stop Indicates the current target is requesting the master to stop the current transaction. I/O 3.3V PCI 4 PCIX0:2TRDY Indicates the target agent’s ability to complete the current data phase of the transaction. I/O 3.3V PCI 4 PCIX0:2VC Voltage control output. Used to control the voltage regulator supplying the PCI I/O voltage. See PCI-XCap signal. 0 = 3.3V (PCI I/O) 1 =1.5V (PCI-X DDR) O 3.3(1.5)V PCI PCIX0:2VRef0:1 Voltage reference input for PCI-X mode 2/DDR (1.5V) I/O. Not used for PCI or PCI-X mode 1. IVPCIXDDR 5 Table 6. Signal Functional Description (Sheet 2 of 7) Notes: 1. Receiver input has hysteresis 2. Must pull up (recommended value is 3k Ω to 3.3V) 3. Must pull down (recommended value is 1k Ω) 4. If not used, must pull up (recommended value is 3k Ω to 3.3V) 5. If not used, must pull down (recommended value is 1k Ω) 6. Strapping input during reset; pull-up or pull-down required Signal Name Description I/O Type Notes |
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