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GL861 Datasheet(PDF) 14 Page - GENESYS LOGIC |
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GL861 Datasheet(HTML) 14 Page - GENESYS LOGIC |
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14 / 19 page ![]() GL861 USB 2.0 Controller for PC-DTV ©2000-2005 Genesys Logic Inc. - All rights reserved. Page 14 CHAPTER 4 FUNCTIONAL DESCRIPTION 4.1 Function Block Figure 4.1 - Block Diagram l DTV Interface GL861 can link with various MPEG2-TS demodulators on market for DTV terrestrial application. GL861 also builds in PID filter for channel demultiplex operation. That will make USB full speed application more realizable and no extra component is needed. This function can filter totally 34 PID by setting. l TXFIFO GL861 builds in 6K bytes internal buffer for high bandwidth application. This 6K internal buffer can be used as transmitted buffer of isochronous pipe or bulk pipe. l PIE PIE handles the USB protocol defined in chapter 8 of USB specification Revision 2.0. It co-works with CPU to play the role of the chip’s kernel. The main functions of PIE include the state machine of USB protocol flow, CRC check, PID error check, and timeout check. Unlike USB1.1, bit stuffing/de-stuffing is implemented in UTMI, not in PIE. l USB 2.0 PHY (UTMI ) UTMI handles the low level USB protocol and signaling. It’s designed based on the Intel’s UTMI specification 1.01. The major functions of UTMI logic are to handle the data and clock recovery, NRZI encoding/decoding, Bit stuffing /de-stuffing, supporting USB2.0 test modes, and serial/parallel conversion. l CPU CPU is the micro-processor unit of GL861. It is an 8-bit 8052 processor with 8K ROM and 256 bytes RAM. It operates at 15Mhz clock to decode the USB command issued from host and then prepares the data to respond to the host. In addition, μC can handle GPIO (general purpose I/O) settings and reading content of EEPROM to support high flexibility for various configurations. These configurations include self/bus power mode setting, individual/gang mode setting, downstream port number setting, device removable/non-removable setting, and PID/VID setting. |
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