GL9711 datasheet(7/42 Pages) GENESYS

7 / 42 page

GL9711 PCI Express

TM PIPE x1 PHY

Page 7

LIST OF TABLES

TABLE 3.1 - BALL OUT ................................................................................................... 10

TABLE 3.2 - NUMERIC PIN LIST...................................................................................... 11

TABLE 3.3 - ALPHABETIC PIN LIST ................................................................................ 13

TABLE 3.4 - PIN DESCRIPTIONS...................................................................................... 15

TABLE 3.5 - PARAMETER OF BUFFER I/O....................................................................... 18

TABLE 4.1 - BASE ADDRESS FOR REGISTERS..................................................................19

TABLE 6.1 - PIN FUNCTIONS........................................................................................... 32

TABLE 7.1 - DC VOLTAGE SPECIFICATIONS...................................................................34

TABLE 7.2 - TRANSMIT AND RECEIVE LATENCY TIME................................................... 34

TABLE 7.3 – TRANSITION TIME OF POWER STATE ......................................................... 34

TABLE 7.4 - POWER CONSUMPTION OF EACH POWER STATE IN DIFFERENT OPERATION

MODE.............................................................................................................................35

TABLE 7.5 – TRANSMITTER SERIAL OUTPUT ................................................................. 35

TABLE 7.6 – RECEIVER SERIAL OUTPUT........................................................................ 36

TABLE 7.7 – TEMPERATURE RANGE............................................................................... 36

TABLE 7.8 – THERMAL CHARACTERISTICS.................................................................... 36

TABLE 8.1 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 8-BIT SDR MODE ...39

TABLE 8.2 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 8-BIT DDR MODE...40

TABLE 8.3 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 16-BIT MODE..........40

TABLE 8.4 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 10-BIT SDR MODE . 40

TABLE 8.5 – INPUT SETUP, HOLD TIME AND OUTPUT TIMING FOR 10-BIT DDR MODE. 40

TABLE 8.6 – REFERENCE TIMING INFORMATION...........................................................40

TABLE 10.1 - ORDERING INFORMATION......................................................................... 42

GL9711 Datasheet(PDF) 7 Page - GENESYS LOGIC