Engineering Bulletin

EB381

10

MOTOROLA

Difference:

CONFIG Register

The operation of the CONFIG register on the MC68HC811E2 differs

from the MC68HC11F1. See Figure 6, Figure 7, Table 4, and Table 5.

Case 1

Example:

CONFIG register

Issue:

Some of the bits in the CONFIG register have

different meaning.

Change required: The bits in the CONFIG register ($103F) must be

changed to meet the user’s requirements. Bit 3

(NOSEC) is not used and bits 4–7 (EEPROM

mapping) define different address ranges.

Address:

$103F

Bit 7

654321

Bit 0

Read:

EE3

EE2

EE1

EE0

NOSEC

NOCOP

EEON

Write:

Single-chip reset:

1

1

1

1

U

U

1

1

Bootstrap:

1

1

1

1

U

U(L)

1

1

Expanded:

U

U

U

U

1

U

1

U

Test:

U

U

U

U

1

U(L)

1

0

= Unimplemented

U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch

prior to reset, but the function of COP is controlled by the DISR bit in TEST1 register.

Figure 6. MC68HC811E2 System Configuration Register (CONFIG)

Table 4. MC68HC811E2 EEPROM Mapping

EE[3:0]

EEPROM Location

EE[3:0]

EEPROM Location

0000

$0800–$0FFF

1000

$8800–$8FFF

0001

$1800–$1FFF

1001

$9800–$9FFF

0010

$2800–$2FFF

1010

$A800–$AFFF

0011

$3800–$3FFF

1011

$B800–$BFFF

0100

$4800–$4FFF

1100

$C800–$CFFF

0101

$5800–$5FFF

1101

$D800–$DFFF

0110

$6800–$6FFF

1110

$E800–$EFFF

0111

$7800–$7FFF

1111

$F800–$FFFF

Freescale Semiconductor, Inc.

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