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DAC5682Z Datasheet(PDF) 18 Page - Texas Instruments

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Part # DAC5682Z
Description  16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC)
PDF  56 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC5682Z Datasheet(HTML) 18 Page - Texas Instruments

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DAC-A
DAC-B
100
100
100
100
opt.
PLL
Loop
Filter
DLL
DAC5682ZDAC
CDCM7005
DCLK
SYNC
D0
D15
Agilent 81205A
ParBERT
Pattern
Memory
100
Opt.
Clock
Divider
DAC5682ZEVM
DAC5682ZEVMSMAAdapterBoard
100
100
100
100
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
Agilent 8133A
PulseGenerator
Optional
Divider
HP8665B
Synthesized
Signal
Generator
P
N
P
N
P
N
P
N
Rohde &
Schwartz
FSU
Spectrum
Analyzer
36 each
SMA-SMAcables
SwapCable
ForDAC-B
measurements
DEFINITION OF SPECIFICATIONS
DAC5682Z
SLLS853A – AUGUST 2007 – REVISED NOVEMBER 2007
Figure 25. DAC5682Z Test Configuration for Normal Clock Mode
Adjacent Carrier Leakage Ratio (ACLR): Defined for a 3.84Mcps 3GPP W-CDMA input signal measured in a
3.84MHz bandwidth at a 5MHz offset from the carrier with a 12dB peak-to-average ratio.
Analog and Digital Power Supply Rejection Ratio (APSSR, DPSSR): Defined as the percentage error in the
ratio of the delta IOUT and delta supply voltage normalized with respect to the ideal IOUT current.
Differential Nonlinearity (DNL): Defined as the variation in analog output associated with an ideal 1 LSB
change in the digital input code.
Gain Drift: Defined as the maximum change in gain, in terms of ppm of full-scale range (FSR) per
°C, from the
value at ambient (25
°C) to values over the full operating temperature range.
Gain Error: Defined as the percentage error (in FSR%) for the ratio between the measured full-scale output
current and the ideal full-scale output current.
Integral Nonlinearity (INL): Defined as the maximum deviation of the actual analog output from the ideal output,
determined by a straight line drawn from zero scale to full scale.
Intermodulation Distortion (IMD3, IMD): The two-tone IMD3 or four-tone IMD is defined as the ratio (in dBc) of
the worst 3rd-order (or higher) intermodulation distortion product to either fundamental output tone.
Offset Drift: Defined as the maximum change in DC offset, in terms of ppm of full-scale range (FSR) per
°C,
from the value at ambient (25
°C) to values over the full operating temperature range.
Offset Error: Defined as the percentage error (in FSR%) for the ratio of the differential output current
(IOUT1–IOUT2) and the mid-scale output current.
Output Compliance Range: Defined as the minimum and maximum allowable voltage at the output of the
current-output DAC. Exceeding this limit may result reduced reliability of the device or adversely affecting
distortion performance.
Reference Voltage Drift: Defined as the maximum change of the reference voltage in ppm per degree Celsius
from value at ambient (25
°C) to values over the full operating temperature range.
Spurious Free Dynamic Range (SFDR): Defined as the difference (in dBc) between the peak amplitude of the
output signal and the peak spurious signal.
18
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): DAC5682Z



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