SM5819AF

SEIKO NPC CORPORATION —6

AC Electrical Characteristics

When DSBCK and PLRCK clocks are supplied by external clock input, their frequencies are related to the

MCK input frequency by the following frequency divider ratios.

(DSBCK) cycle

= 8

× MCK cycle (64fs)

(PLRCK) cycle [4fs mode] = 128

× MCK cycle (4fs)

(PLRCK) cycle [2fs mode] = 256

× MCK cycle (2fs)

(PLRCK) cycle [fs mode] = 512

× MCK cycle (fs)

System clock

I

MCK pin

External system clock

I

EXIMCK pin

Parameter

Symbol

Rating

Unit

min

typ

max

"H"-level pulsewidth

13

–

–

ns

"L"-level pulsewidth

13

–

–

ns

Pulse cycle

40

44.29 (1/512fs)

–

ns

Rise/fall time

–

–

10

ns

Parameter

Symbol

Rating

Unit

min

typ

max

"H"-level pulsewidth

13

–

–

ns

"L"-level pulsewidth

13

–

–

ns

Pulse cycle

40

–

–

ns

Rise/fall time

–

–

10

ns

MCK

EXIMCK