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SM5819AF Datasheet(PDF) 12 Page - Nippon Precision Circuits Inc

Part # SM5819AF
Description  6-channel DSD-PCM Converter
PDF  18 Pages
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Manufacturer  NPC [Nippon Precision Circuits Inc]
Direct Link  http://www.npc.co.jp/en
Logo NPC - Nippon Precision Circuits Inc

SM5819AF Datasheet(HTML) 12 Page - Nippon Precision Circuits Inc

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SM5819AF
SEIKO NPC CORPORATION —12
Data Output Selection
PCM output selection
The PCM output and decimation filter processing is set by SEL4FS, SEL1FS and SELEXT, as shown in the
following table.
I
The external data setting (SELEXT) has priority over the 4fs/2fs/fs selection setting (SEL1FS, SEL4FS).
I
Also, the fs setting (SEL1FS) has priority over the 4fs/2fs setting (SEL4FS).
Clock Input/Output Selection and Resynchronization Operation
DSD clock input/output switching
The DSD input bit clock (DSBCK) can be switched between input and output by DIRDSCK.
PCM clock input/output switching
The PCM output word clock (PLRCK) and bit clock (PBCK) can be switched between input and output by
DIRPCK.
However, when external data is selected using SELEXT, the clocks PLRCK and PBCK are switched to outputs,
regardless of the DIRPCK setting, thus care must be exercised with external connections.
Setting
PCM output system
Clock
output
Filter
processing
SEL1FS
SEL4FS
SELEXT
POFLR
POSLR
POCSW
PLRCK
PBCK
MCKOUT
LHL
DSIFL
DSIFR
DSISL
DSISR
DSICT
DSISW
4fs
MCK
4fs
480th-order
LLL
DSIFL
DSIFR
DSISL
DSISR
DSICT
DSISW
2fs
MCK
2fs
480th-order
H
L or H
L
DSIFL
DSIFR
DSISL
DSISR
DSICT
DSISW
fs
MCK
fs
480th-order
L or H
L or H
H
EXIFLR
EXISLR
EXICSW
EXILRCK
EXIBCK
EXIMCK
Invalid
Setting
I/O state
DIRDSCK
DSBCK
L
Input (Slave)
H
Output (Master)
Setting
I/O state
DIRPCK
PLRCK
PBCK
L
Output (Master)
H
Input (Slave)



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