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ADE9113 Datasheet(PDF) 35 Page - Analog Devices

Part # ADE9113
Description  Isolated, Sigma-Delta ADCs with SPI
PDF  55 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADE9113 Datasheet(HTML) 35 Page - Analog Devices

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Data Sheet
ADE9103/ADE9112/ADE9113
APPLICATIONS INFORMATION
analog.com
Rev. A | 35 of 55
Power-Up Procedure for Systems with Multiple
Devices That Use a Single Crystal
For the polyphase energy meters detailed in the Polyphase Energy
Meters section, in which, one single crystal is used, the power-up
procedure is as follows (see Figure 45):
1. Supply VDD to the ADE9103/ADE9112/ADE9113 devices.
To ensure that the Phase A ADE9112/ADE9113 (shown as
ADE9112A/ADE9113A in Figure 45) device starts functioning
correctly, the supply must reach 3.3 V − 10% in less than 16
ms from approximately a 2.5 V level. The ADE9112A/ADE9113A
device is clocked by the 16.384 MHz crystal and then starts
functioning. The other ADE9103/ADE9112/ADE9113 devices
are not clocked yet.
2. The DC-to-DC converter powers up and supplies the isolated
side of the ADE9112A/ADE9113A. The Σ-Δ modulators then
become functional. This process takes approximately 62 ms
to execute when the recommended capacitors on the VDDISO,
ALDOOUT, and REFOUT pins described in Table 12 are used.
After this time, the isolated side of the ADE9112A/ADE9113A is
fully functional.
3. To determine when the ADE9112A/ADE9113A device is ready
to accept commands, the STATUS0 register is read until Bit
5 (RESET_DONE) is set to 1, which happens approximately
32 ms after the ADE9112A/ADE9113A start to function and
indicates that the controller side of the ADE9112A/ADE9113A is
fully functional using the default settings.
4. Initialize the CONFIG0 register of the ADE9112A/ADE9113A
with Bit 0 (CLKOUT_EN) set to 1. The CLKOUT signal is
provided at the CLKOUT/DREADY pin, and the ADE9103/
ADE9112/ADE9113 devices on the other phases are now
clocked.
5. The DC-to-DC converters of the otherADE9112 and ADE9113
devices power up and supply their isolated sides. The Σ-Δ
modulators then become functional. This process takes approx-
imately 62 ms to execute when the recommended capacitors on
the VDDISO, ALDOOUT, and REFOUT pins described in Table
12 are used. The isolated sides of the ADE9112 and ADE9113
devices are now fully functional. While the ADE9103 has no
isolation and is entirely powered by VDD, the power-up timing
remains the same.
6. Read the STATUS0 registers of the remaining ADE9103/
ADE9112/ADE9113 devices until Bit 5 (RESET_DONE) is set to
1, indicating that their nonisolated sides are fully functional with
default settings, which happens approximately 32 ms after the
clock signal is provided.
7. Initialize any registers of all remaining ADE9103/ADE9112/
ADE9113 devices. Select one ADE9112/ADE9113 device
(Phase C, for example, ADE9112C/ADE9113C in Figure 45) and
connect the CLKOUT/DREADY pin to an external interrupt input
and output pin of the microcontroller. ADE9112C/ADE9113C
must have Bit 0 (CLKOUT_EN) in the CONFIG0 register left at
the default value of 0 to use the DREADY functionality of the
CLKOUT/DREADY pin.
8. Execute a SYNC_SNAP = 0x02 write broadcast to synchronize
all the ADE9103/ADE9112/ADE9113 devices of the meter (see
the Synchronizing Multiple ADE9103/ADE9112/ADE9113 Devi-
ces section).
9. Execute a WR_LOCK = 0xD4 write broadcast to protect the
configuration registers of all ADE9103/ADE9112/ADE9113 devi-
ces. See the Protecting the Integrity of Configuration Registers
section.
Figure 45. Power-Up Procedure for Systems with Multiple Devices; Only Phase A ADE9112A/ADE9113A Is Clocked from a Crystal



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