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LT7170 Datasheet(PDF) 32 Page - Analog Devices |
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LT7170 Datasheet(HTML) 32 Page - Analog Devices |
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32 / 36 page ![]() Data Sheet LT7170/LT7170-1 LAYOUT CONSIDERATIONS analog.com Rev. A | 32 of 36 Note that large, switched currents flow in the LT7170/LT7170-1 VIN and PGND pins and the input capacitors. Ensure that the loops formed by the input capacitors are as small as possible by placing the input capacitors next to the VIN and PGND pins. Place the LT7170/LT7170-1 input capacitors, inductor, and output capacitors on the surface layer of the circuit board and make their connections on that layer. Place a local, unbroken ground plane under the application circuit on the layer closest to the surface layer. Minimize the routing area of the SW and BOOST switching nodes to minimize electromagnetic interference (EMI) and to reduce stray capacitance. For applications that use the full output current capaci- ty of the LT7170/LT7170-1, ensure that the selection of the PCB copper thickness and width supports the maximum SW current. For more detail and PCB design files, refer to the EVAL-LT7170 and EVAL-LT7170-1 user guides for the LT7170/LT7170-1. Figure 41. LT7170 Recommended PCB Layout |
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