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CS280 Datasheet(PDF) 6 Page - Advanced Micro Devices |
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CS280 Datasheet(HTML) 6 Page - Advanced Micro Devices |
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6 / 14 page  XC95288XL High Performance CPLD 6 www.xilinx.com DS055 (v2.1 April 3, 2007 1-800-255-7778 Product Specification R Internal Timing Parameters Symbol Parameter XC95288XL-6 XC95288XL-7 XC95288XL-10 Units Min Max Min Max Min Max Buffer Delays TIN Input buffer delay - 2.2 - 2.3 - 3.5 ns TGCK GCK buffer delay - 1.2 - 1.5 - 1.8 ns TGSR GSR buffer delay - 2.2 - 3.1 - 4.5 ns TGTS GTS buffer delay - 4.5 - 5.0 - 7.0 ns TOUT Output buffer delay - 2.4 - 2.5 - 3.0 ns TEN Output buffer enable/disable delay -0 -0 - 0 ns Product Term Control Delays TPTCK Product term clock delay - 2.0 - 2.4 - 2.7 ns TPTSR Product term set/reset delay - 1.0 - 1.4 - 1.8 ns TPTTS Product term 3-state delay - 6.2 - 7.2 - 7.5 ns Internal Register and Combinatorial Delays TPDI Combinatorial logic propagation delay - 0.4 - 1.3 - 1.7 ns TSUI Register setup time 2.0 - 2.6 - 3.0 - ns THI Register hold time 1.6 - 2.2 - 3.5 - ns TECSU Register clock enable setup time 2.0 - 2.6 - 3.0 - ns TECHO Register clock enable hold time 1.6 - 2.2 - 3.5 - ns TCOI Register clock to output valid time - 0.2 - 0.5 - 1.0 ns TAOI Register async. S/R to output delay - 6.2 - 6.4 - 7.0 ns TRAI Register async. S/R recover before clock 6.0 7.5 10.0 ns TLOGI Internal logic delay - 1.0 - 1.4 - 1.8 ns TLOGILP Internal low power logic delay - 5.5 - 6.4 - 7.3 ns Feedback Delays TF Fast CONNECT II feedback delay - 1.6 - 3.5 - 4.2 ns Time Adders TPTA Incremental product term allocator delay (first incremental delay) -0.8 -0.8 - 1.0 ns TPTA2 Incremental product term allocator delay (subsequent incremental delay) -0.3 -0.3 - 0.4 ns TSLEW Slew-rate limited delay - 3.5 - 4.0 - 4.5 ns |
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