,

V

DD

V

SS

2

,

2

CD4066B-Q1

SCHS383

– APRIL 2011

www.ti.com

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range (unless otherwise noted)

LIMITS AT INDICATED TEMPERATURES

25

°C

UNIT

VIN

VDD

PARAMETER

TEST CONDITIONS

–40°C

125

°C

(V)

(V)

TYP

MAX

0.5

5

0.25

7.5

0.01

0.25

0.10

10

0.5

15

0.01

0.5

IDD

Quiescent device current

µA

0.15

15

1

30

0.01

1

0.20

20

5

150

0.02

5

SIGNAL INPUTS (Vis) AND OUTPUTS (Vos)

VC = VDD, RL = 10 kΩ returned

5

850

1300

470

1050

10

330

550

180

400

ron

On-state resistance (max)

Ω

to

15

210

320

125

240

Vis = VSS to VDD

5

15

On-state resistance

Δron

difference between any two

RL = 10 kΩ, VC = VDD

10

10

Ω

switches

15

5

VC = VDD = 5 V, VSS = –5 V,

THD

Total harmonic distortion

Vis(p-p) = 5 V (sine wave centered on 0 V),

0.4%

RL = 10 kΩ, fis = 1-kHz sine wave

3-dB cutoff frequency

VC = VDD = 5 V, VSS = –5 V, Vis(p-p) = 5 V

40

MHz

(switch on)

(sine wave centered on 0 V), RL = 1 kΩ

–50-dB feedthrough

VC = VSS = –5 V, Vis(p-p) = 5 V

1

MHz

frequency (switch off)

(sine wave centered on 0 V), RL = 1 kΩ

Input/output leakage current

VC = 0 V, Vis = 18 V, Vos = 0 V; and VC = 0 V,

Iis

18

±0.1

±1

±0.1

µA

±10-5

(switch off) (max)

Vis = 0 V, Vos = 18 V

VC(A) = VDD = 5 V,

–50-dB crosstalk frequency

VC(B) = VSS = -5 V,

8

MHz

Vis(A) = 5 Vp-p, 50-Ω source, RL = 1 kΩ

5

20

40

RL = 200 kΩ, VC = VDD, VSS = GND,

Propagation delay (signal

tpd

CL = 50 pF, Vis = 10 V

10

10

20

ns

input to signal output)

(square wave centered on 5 V), tr, tf = 20 ns

15

7

15

Cis

Input capacitance

VDD = 5 V, VC = VSS = –5 V

8

pF

Cos

Output capacitance

VDD = 5 V, VC = VSS = –5 V

8

pF

Cios

Feedthrough

VDD = 5 V, VC = VSS = –5 V

0.5

pF

4

Submit Documentation Feedback

Copyright

© 2011, Texas Instruments Incorporated

Product Folder Link(s) :CD4066B-Q1