| Electronic Components Datasheet Search |
|
DDC232CK Datasheet(PDF) 26 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DDC232CK Datasheet(HTML) 26 Page - Texas Instruments |
|
26 / 35 page ![]() PowerSupplies RESET t POR t RST CONV AVDD DVDD AGND DGND DDC232 10 F m 0.1 F m 0.1 F m VA 10 F m VD DDC232 SBAS331D – AUGUST 2004 – REVISED APRIL 2010 www.ti.com POWER-UP SEQUENCING LAYOUT Prior to power-up, all digital and analog inputs must POWER SUPPLIES AND GROUNDING be low. At the time of power-up, all of these signals should remain low until the power supplies have Both AVDD and DVDD should be as quiet as stabilized, as shown in Figure 24. At this time, begin possible. It is particularly important to eliminate noise supplying the master clock signal to the CLK pin. from AVDD that is nonsynchronous with the DDC232 Wait for time tPOR, then give a RESET pulse. After operation. Figure 25 illustrates how to supply power releasing RESET, the configuration register must be to the DDC232. Each supply of the DDC232 should programmed. Table 16 shows the timing for the be bypassed with 10mF solid tantalum capacitors. It is power-up sequence. recommended that both the analog and digital grounds (AGND and DGND) be connected to a single ground plane on the printed circuit board (PCB). Figure 24. DDC232 Timing at Power-Up Figure 25. Power-Supply Connections Table 16. Timing Characteristics for DDC232 Power-Up Sequence Shielding Analog Signal Paths SYMBOL DESCRIPTION MIN TYP MAX UNITS As with any precision circuit, careful PCB layout will Wait After Power-Up ensure the best performance. It is essential to make tPOR 250 ms Until Reset short, direct interconnections and avoid stray wiring tRST Reset Low Width 1 ms capacitance—particularly at the analog input pins and QGND. These analog input pins are high-impedance BLANKSPACE and extremely sensitive to extraneous noise. The QGND pin should be treated as a sensitive analog BLANKSPACE signal and connected directly to the supply ground BLANKSPACE with proper shielding. Leakage currents between the PCB traces can exceed the input bias current of the BLANKSPACE DDC232 if shielding is not implemented. Digital signals should be kept as far as possible from the analog input signals on the PCB. 26 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): DDC232 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |