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NB679GD Datasheet(PDF) 6 Page - Monolithic Power Systems

Part # NB679GD
Description  28V, Low Iq, High Current, Fixed 5V-8A Synchronous Buck Converter with 100 mA LDO
PDF  18 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

NB679GD Datasheet(HTML) 6 Page - Monolithic Power Systems

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NB679
— 28V VIN, FIXED 5V-8A BUCK CONVERTER WITH LDO
NB679 Rev. 1.03
www.MonolithicPower.com
6
7/27/2017
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
PIN FUNCTIONS
NB679
PIN #
Name
Description
1
VIN
Supply voltage. VIN supplies power for the internal MOSFET and regulator. The NB679
operates from a 5.5 V to 24 V input rail. An input capacitor is needed to decouple the input
rail. Use wide PCB traces and multiple vias to make the connection. Apply at least two
layers for this input trace.
2
PGND
Power ground. Use wide PCB traces and enough vias to handle the load current to make
the connection. Make the PGND trace to the Vin decoupling capacitor as wide as
possible.
3
PG
Power good output. The output of PG is an open-drain signal. It is high if the output
voltage is higher than 95 percent of the nominal voltage or lower than 105 percent of the
nominal voltage.
4
NC
No connection.
5
VOUT
VOUT is used to sense the output voltage of the buck regulator. Connect VOUT to
the output capacitor of the regulator directly. Also, VOUT acts as the input of the internal
LDO switch over power input. Keep the VOUT sensing trace far away from the SW node.
Avoid vias on the VOUT sensing trace. A >25 mil trace is required.
6
LDO
Internal LDO output. Decouple with a minimum 4.7 µF ceramic capacitor as close to
LDO as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for
their stable temperature characteristics. If ENLDO is high, it switches over to the LDO to
buck after PG is ok.
7
SW
Switch
output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to
the VIN voltage by the high-side switch during the on-time of the PWM duty cycle. The
inductor current drives SW negative during the off-time. The on-resistance of the low-side
switch and the internal diode fixes the negative voltage. Use wide and short PCB traces to
make the connection. Try to minimize the area of the SW pattern.
8
BST
Bootstrap. A capacitor connected between SW and BS is required to form a floating
supply across the high-side switch driver.
9
VCC
Internal VCC LDO output. The driver and control circuits are powered from this voltage.
Decouple with a minimum 1 µF ceramic capacitor as close to VCC as possible. X7R or
X5R grade dielectric ceramic capacitors are recommended for their stable temperature
characteristics.
10
AGND
Signal logic ground. Kelvin connection to PGND.
11
EN
Buck enable. EN is a digital input that turns the buck regulator on or off. When the power
supply of the control circuit is ready, drive EN high to turn on the buck regulator, and drive
it low to turn off the buck regulator. Connect EN to 3V3 through a pull-up resistor or a
resistive voltage divider for automatic start-up. Do NOT float this pin. EN can be used to
set USM. When EN is in the range of 1.4 V to 1.8 V, it enters USM. If EN is in the range of
2.6V to 3.6V, it operates in normal mode.
12
ENLDO
LDO enable pin. ENLDO is pulled up internally to high. Leave ENLDO open to enable the
LDO. Drive it low to turn off the LDO.



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