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LTC4223CDHD-2 Datasheet(PDF) 19 Page - Linear Technology |
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LTC4223CDHD-2 Datasheet(HTML) 19 Page - Linear Technology |
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19 / 24 page ![]() LTC4223-1/LTC4223-2 19 422312f P CV t AVG L OUT CHARGE = 1 2 12 2 • • The inrush current can be limited by using the GATE ca- pacitance (CG) so that the power dissipated in the MOSFET is well within its safe operating area (SOA). For IGATE = 10μA and CL1 = 800μF, we choose CG = 15nF to set the inrush current to 0.5A. I CI C A t CV I INRUSH LGATE G CHARGE L OUT == = 1 1 05 12 • . • IINRUSH ms = 19 This results in PAVG = 3W and the MOSFET selected must be able to tolerate 3W for 19ms. The increase in steady state junction temperature due to power dissipated in the MOSFET is ΔT = PAVG • Zth where Zth is the thermal impedance. Under this condition, the Si7336ADP datasheet’s Tran- sient Thermal Impedance plot indicates that the junction temperature will increase by 2.4°C using ZthJC = 0.8°C/W (single pulse). The duration and magnitude of the power pulse that results during a short-circuit condition on the 12V output are a function of the TIMER capacitance and LTC4223’s analog current limit. The short-circuit duration is given as 0.1μF • 6[ms/μF] = 600μs for CT = 0.1μF. The maximum short- circuit current is calculated using the maximum analog current limit threshold, ΔVSENSE(ACL)(MAX) and minimum RSENSE value. I V R SHORT MAX SENSE ACL MAX SENSE MIN () ()( ) () = Δ = 66m mV m A 594 11 . Ω = So the maximum power dissipated in the MOSFET is 11A • 12V or 132W for 600μs. The Si7336ADP datasheet’s Tran- sient Thermal Impedance plot indicates that the worse-case increase in junction temperature during the short-circuit condition is 13.2°C using ZthJC = 0.1°C/W (single pulse). This will not cause the maximum junction temperature to be exceeded. The SOA curves of the Si7336ADP are also checked to be safe under this condition. APPLICATIONS INFORMATION I V R TRIP MIN SENSE CB MIN SENSE MAX () ()( ) () . = Δ = 47 5m mV m A I V R TRIP MAX SENSE CB MAX S 606 78 . . () ()( ) Ω = = Δ E ENSE MIN mV m A () . . . == 52 5 594 88 Ω For proper operation, ITRIP(MIN) must exceed the maximum load current with margin, so RSENSE = 6mΩ should suffice for the 12V supply. The second step is to determine the TIMER capacitance based on the time required to charge up completely the output load capacitor on auxiliary supply in active current limit without exceeding the fault filter delay. The worst- case start-up time is calculated using the minimum active current limit value for the auxiliary supply. t CV I µF STUP AUX LAUX AUX ACL MIN () ()( ) •. • == 2 33 150 3 33 165 3 .V mA ms = For a start-up time of 3ms with a 2x safety margin, the TIMER capacitance is calculated as: C t ms µF ms ms µF T STUP AUX = [] = [] ≅ 2 123 6 123 00 • // . () 5 5µF Considering the tolerances for the TIMER charging rate and capacitance, a value of 0.1μF (±10%) for CT should suffice. Since the TIMER charging rate during fault time-out is 20 times faster for the 12V supply as compared to the auxiliary supply during start-up, this scheme ensures that the external MOSFET will not overheat under any output- short condition. The fault filter delay for the 12V supply is given by 0.1μF • 6[ms/μF] = 600μs versus 12ms for the auxiliary supply. The next step is to verify that the thermal ratings of the selected external MOSFET for the 12V supply aren’t ex- ceeded during power-up or an output-short. Assuming the MOSFET dissipates power only due to inrush current charging the load capacitor, the energy dissipated in the MOSFET during power-up is the same as that stored into the load capacitor. The average power dissipated in the MOSFET is given by: |
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