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LM3553 Datasheet(PDF) 10 Page - Texas Instruments |
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LM3553 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 25 page ![]() start msb Chip Address lsb w ack msb Register Add lsb ack msb DATA lsb ack stop ack from slave ack from slave ack from slave SCL start Id = 53h w ack addr = 10h ack ack data = 08h stop SDA SCL S P P STO condition START condition SDA LM3553 SNVS414B – FEBRUARY 2008 – REVISED MAY 2013 www.ti.com START AND STOP CONDITIONS START and STOP conditions classify the beginning and the end of the I2C session. A START condition is defined as SDA signal transitioning from HIGH to LOW while SCL line is HIGH. A STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP conditions. The I2C bus is considered to be busy after a START condition and free after a STOP condition. During data transmission, the I2C master can generate repeated START conditions. First START and repeated START conditions are equivalent, function-wise. The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, the state of the data line can only be changed when CLK is LOW. Figure 17. Start and Stop Conditions TRANSFERRING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM3553 pulls down the SDA line during the 9th clock pulse, signifying an acknowledge. The LM3553 generates an acknowledge after each byte has been received. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LM3553 address is 53h. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The third byte contains data to write to the selected register. w = write (SDA = "0") ack = acknowledge (SDA pulled down by the slave) id = chip address, 53h for LM3553 Figure 18. Write Cycle I 2C COMPATIBLE CHIP ADDRESS The chip address for LM3553 is 1010011, or 53hex. 10 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM3553 |
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