SYNC

10k

S

R

Q

Q

DEADTIME

ONE-SHOT

5V

2.5V

I = f(RT)

SYNC

LM5575

UP TO 5 TOTAL

DEVICES

LM5575

SYNC

SYNC

AGND

LM5575

SW

CLK

SYNC

SW

500 ns

12

LM5575-Q1

SNOSB23F – OCTOBER 2008 – REVISED JULY 2019

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Copyright © 2008–2019, Texas Instruments Incorporated

Device Functional Modes (continued)

Figure 9. Sync From External Clock

Figure 10. Sync From Multiple Devices

Multiple LM5575-Q1 devices can be synchronized together simply by connecting the SYNC pins together. In this

configuration, all of the devices will be synchronized to the highest frequency device. The diagram in Figure 11

shows the SYNC input and output features of the LM5575-Q1. The internal oscillator circuit drives the SYNC pin

with a strong pulldown and weak pullup inverter. When the SYNC pin is pulled low either by the internal oscillator

or an external clock, the ramp cycle of the oscillator is terminated and a new oscillator cycle begins. Thus, if the

SYNC pins of several LM5575-Q1 ICs are connected together, the IC with the highest internal clock frequency

pulls the connected SYNC pins low first and terminate the oscillator ramp cycles of the other ICs. The LM5575-

Q1 with the highest programmed clock frequency will serve as the master and control the switching frequency of

the all the devices with lower oscillator frequency.

Figure 11. Simplified Oscillator Block Diagram and Sync I/O Circuit

7.4.3 Error Amplifier and PWM Comparator

The internal high-gain error amplifier generates an error signal proportional to the difference between the

regulated output voltage and an internal precision reference (1.225 V). The output of the error amplifier is

connected to the COMP pin, which allows the user to provide loop compensation components, generally a type II

network, as shown in Functional Block Diagram. This network creates a pole at DC, a zero and a noise-reducing,

high-frequency pole. The PWM comparator compares the emulated current sense signal from the RAMP

generator to the error amplifier output voltage at the COMP pin.