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Output Drive

Thermal Considerations

P

DQ

+ (10 V

15.5 mA)

+ 155 mW

P

DL +

(5V)2

4

(500 W ø 900 W)

+ 19.4 mW

P

D

+ 155 mW ) 19.4 mW + 174.4 mW

T

J

+ 85oC ) 174.4 mW

125

oC W + 107oC

(6)

Capacitive Loads

OPA699

C

L

R

L

R

T

R

S

R

G

R

F

V

O

R

L is optional

S0048-02

OPA699M

SGLS289A – MAY 2005 – REVISED MARCH 2006

The OPA699 has been optimized to drive 500-

Ω loads, such as ADCs. It still performs well driving 100-Ω loads;

the specifications are shown for the 500-

Ω load. This makes the OPA699 an ideal choice for a wide range of

high-frequency applications.

Many high-speed applications, such as driving ADCs, require op amps with low output impedance. As shown in

the typical performance curve Output Impedance vs Frequency, the OPA699 maintains low closed-loop output

impedance over frequency. Closed-loop output impedance increases with frequency, since loop gain decreases

with frequency.

The OPA699 does not require heat sinking under most operating conditions. Maximum desired junction

temperature sets a maximum allowed internal power dissipation as described below. In no case should the

maximum junction temperature be allowed to exceed 150°C.

The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and the additional power dissipated

in the output stage (PDL), while delivering load power. PDQ is simply the specified no-load supply current times

the total supply voltage across the part. PDL depends on the required output signals and loads. For a grounded

resistive load, and equal bipolar supplies, it is at maximum when the output is at 1/2 either supply voltage. In this

condition, PDL = VS

2/(4R

L) where RL includes the feedback network loading. Note that it is the power in the output

stage and not in the load, that determines internal power dissipation.

The operating junction temperature is: TJ = TA + PD × θJA, where TA is the ambient temperature. For example, the

maximum TJ for a OPA699ID with G = +6, RF = 750 Ω, RL = 500 Ω, and ±VS = ±5 V at the maximum TA = 85°C

is calculated as:

This would be the maximum TJ from VO = ±2.5 VDC. Most applications will be at a lower output stage power and

have a lower TJ. Care must be taken when operating at higher ambient temperatures.

Capacitive loads, such as the input to ADCs, decreases the amplifier phase margin, which may cause

high-frequency peaking or oscillations. Capacitive loads

≥2 pF should be isolated by connecting a small resistor

in series with the output, as shown in Figure 60. Increasing the gain from +2 improves the capacitive drive

capabilities due to increased phase margin.

Figure 60. Driving Capacitive Loads

26

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