−100

−99

−98

−97

−96

−95

−94

−93

−92

−91

−90

0

10

20

30

40

fSAMPLE Condition − kHz

44.1

96(2)

48(1)

(1)fS = 48 kHz, System Clock = 256 fS,

Oversampling Ratio =

×128.

(2)fS = 96 kHz, System Clock = 256 fS,

Oversampling Ratio =

×64.

G011

c

f

=

RC

1

2p

18

PCM1803A

SLES142B – JUNE 2005 – REVISED JULY 2016

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Product Folder Links: PCM1803A

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Copyright © 2005–2016, Texas Instruments Incorporated

Typical Application (continued)

8.2.1 Design Requirements

For this design example, use the parameters listed in Table 11 as the input parameters.

Table 11. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Analog Input Voltage Range

0 Vp-p to 3 Vp-p

Output

PCM audio data

System Clock Input Frequency

2.048 MHz to 49.152 MHz

Output Sampling Frequency

8 kHz to 96 kHz

Power Supply

3.3 V and 5 V

8.2.2 Detailed Design Procedure

8.2.2.1 Control Pins

The control pins such as the FMT, MODE, OSR, and BYPASS can be controlled by tying up to VDD, down to

GND, or driven with GPIO from the DSP or audio processor.

8.2.2.2 DSP or Audio Processor

In this application a DSP or audio processor is acting as the audio master, and the PCM1803A is acting as the

audio slave. This means the DSP or audio processor must be able to output audio clocks that the PCM1803A

can use to process audio signals.

8.2.2.3 Input Filters

For the analog input circuit an AC coupling capacitor must be placed in series with the input. This removes the

DC component of the input signal. An RC filter can also be implemented to filter out of band noise to reduce

aliasing. Equation 1 can be used to calculate the cutoff frequency of the optional RC filter for the input.

(1)

8.2.3 Application Curve

Figure 25. Total Harmonic Distortion + Noise vs fSAMPLE Condition