AM53C96 datasheet(18/63 Pages) AMD

18 / 63 page

P R E L I M I N A R Y

AMD

Am53C94/Am53C96

CMDREG – Bit 7 – DMA – Direct Memory Access

The DMA bit when set notifies the device that the com-

mand is a DMA instruction, when reset it is a non-DMA

instruction. For DMA instructions the Current Transfer

Count Register (CTCREG) will be loaded with the con-

tents of the Start Transfer Count Register (STCREG).

The data is then transferred and the CTCREG is decre-

mented for each byte until it reaches zero.

CMDREG – Bits 6:0 – CMD 6:0 – Command 6:0

These command bits decode the commands that the

device needs to perform. There are a total of 29

commands grouped into four categories. The groups

are Initiator Commands, Target Commands, Selection/

Reselection Commands and General Purpose Com-

mands.

Initiator Commands

CMD6

CMD5

CMD4

CMD3

CMD2

CMD1

CMD0

Command

010000

Information Transfer

0100

Initiator Command Complete Steps

010010

Message Accepted

011000

Transfer Pad Bytes

011010

Set ATN

011011

Reset ATN

Target Commands

CMD6

CMD5

CMD4

CMD3

CMD2

CMD1

CMD0

Command

100000

Send Message

100001

Send Status

100010

Send Data

100011

Disconnect Steps

100100

Terminate Steps

100101

Target Command Complete Steps

100111

Disconnect

101000

Receive Message Steps

101001

Receive Command

101010

Receive Data

101011

Receive Command Steps

000100

DMA Stop

Idle Commands

CMD6

CMD5

CMD4

CMD3

CMD2

CMD1

CMD0

Command

000000

Reselect Steps

0000

Select without ATN Steps

000010

Select with ATN Steps

000011

Select with ATN and Stop Steps

000100

Enable Selection/Reselection

000101

Disable Selection/Reselection

000110

Select with ATN3 Steps

General Commands

CMD6

CMD5

CMD4

CMD3

CMD2

CMD1

CMD0

Command

000000

No Operation

0000

Clear FIFO

000010

Reset Device

000011

Reset SCSI Bus

AM53C96 Datasheet(PDF) 18 Page - Advanced Micro Devices

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